Hrvoje Varga 52c95ef5b8 [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions ... Differential Revision: http://reviews.llvm.org/D16625 llvm-svn: 273850		2016-06-27 08:23:28 +00:00
..
abi-bad.s	[mips] Don't derive the default ABI from the CPU in the backend.	2016-06-23 12:42:53 +00:00
abiflags.s	[mips] Don't derive the default ABI from the CPU in the backend.	2016-06-23 12:42:53 +00:00
invalid.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
valid-xfail.s	[mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's.	2015-12-07 14:12:44 +00:00
valid.s	[mips] Weaken asm predicate for memory offsets	2016-05-27 13:56:36 +00:00