Tim Northover eae1f1c8cc CodeGen: extend f16 conversions to permit types > float. ... This makes the two intrinsics @llvm.convert.from.f16 and @llvm.convert.to.f16 accept types other than simple "float". This is only strictly needed for the truncate operation, since otherwise double rounding occurs and there's no way to represent the strict IEEE conversion. However, for symmetry we allow larger types in the extend too. During legalization, we can expand an "fp16_to_double" operation into two extends for convenience, but abort when the truncate isn't legal. A new libcall is probably needed here. Even after this commit, various target tweaks are needed to actually use the extended intrinsics. I've put these into separate commits for clarity, so there are no actual tests of f64 conversion here. llvm-svn: 213248		2014-07-17 10:51:23 +00:00
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AArch64	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
ARM	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.	2014-07-14 13:08:14 +00:00
MSP430
NVPTX	[NVPTX] Honor alignment on vector loads/stores	2014-07-16 19:45:35 +00:00
PowerPC	[PowerPC] Fix invalid displacement created by LocalStackAlloc	2014-07-11 17:19:31 +00:00
R600	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	CodeGen: extend f16 conversions to permit types > float.	2014-07-17 10:51:23 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00