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eb66b33867
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
325 lines
12 KiB
C++
325 lines
12 KiB
C++
//===--- RuntimeDyldCOFFThumb.h --- COFF/Thumb specific code ---*- C++ --*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// COFF thumb support for MC-JIT runtime dynamic linker.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_EXECUTIONENGINE_RUNTIMEDYLD_TARGETS_RUNTIMEDYLDCOFFTHUMB_H
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#define LLVM_LIB_EXECUTIONENGINE_RUNTIMEDYLD_TARGETS_RUNTIMEDYLDCOFFTHUMB_H
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#include "../RuntimeDyldCOFF.h"
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#include "llvm/Object/COFF.h"
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#include "llvm/Support/COFF.h"
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#define DEBUG_TYPE "dyld"
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namespace llvm {
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static bool isThumbFunc(symbol_iterator Symbol, const ObjectFile &Obj,
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section_iterator Section) {
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Expected<SymbolRef::Type> SymTypeOrErr = Symbol->getType();
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if (!SymTypeOrErr) {
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std::string Buf;
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raw_string_ostream OS(Buf);
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logAllUnhandledErrors(SymTypeOrErr.takeError(), OS, "");
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OS.flush();
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report_fatal_error(Buf);
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}
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if (*SymTypeOrErr != SymbolRef::ST_Function)
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return false;
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// We check the IMAGE_SCN_MEM_16BIT flag in the section of the symbol to tell
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// if it's thumb or not
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return cast<COFFObjectFile>(Obj).getCOFFSection(*Section)->Characteristics &
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COFF::IMAGE_SCN_MEM_16BIT;
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}
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class RuntimeDyldCOFFThumb : public RuntimeDyldCOFF {
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public:
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RuntimeDyldCOFFThumb(RuntimeDyld::MemoryManager &MM,
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JITSymbolResolver &Resolver)
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: RuntimeDyldCOFF(MM, Resolver) {}
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unsigned getMaxStubSize() override {
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return 16; // 8-byte load instructions, 4-byte jump, 4-byte padding
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}
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unsigned getStubAlignment() override { return 1; }
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Expected<relocation_iterator>
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processRelocationRef(unsigned SectionID,
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relocation_iterator RelI,
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const ObjectFile &Obj,
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ObjSectionToIDMap &ObjSectionToID,
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StubMap &Stubs) override {
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auto Symbol = RelI->getSymbol();
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if (Symbol == Obj.symbol_end())
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report_fatal_error("Unknown symbol in relocation");
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Expected<StringRef> TargetNameOrErr = Symbol->getName();
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if (!TargetNameOrErr)
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return TargetNameOrErr.takeError();
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StringRef TargetName = *TargetNameOrErr;
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auto SectionOrErr = Symbol->getSection();
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if (!SectionOrErr)
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return SectionOrErr.takeError();
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auto Section = *SectionOrErr;
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uint64_t RelType = RelI->getType();
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uint64_t Offset = RelI->getOffset();
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// Determine the Addend used to adjust the relocation value.
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uint64_t Addend = 0;
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SectionEntry &AddendSection = Sections[SectionID];
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uintptr_t ObjTarget = AddendSection.getObjAddress() + Offset;
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uint8_t *Displacement = (uint8_t *)ObjTarget;
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switch (RelType) {
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case COFF::IMAGE_REL_ARM_ADDR32:
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case COFF::IMAGE_REL_ARM_ADDR32NB:
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case COFF::IMAGE_REL_ARM_SECREL:
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Addend = readBytesUnaligned(Displacement, 4);
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break;
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default:
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break;
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}
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#if !defined(NDEBUG)
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SmallString<32> RelTypeName;
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RelI->getTypeName(RelTypeName);
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#endif
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DEBUG(dbgs() << "\t\tIn Section " << SectionID << " Offset " << Offset
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<< " RelType: " << RelTypeName << " TargetName: " << TargetName
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<< " Addend " << Addend << "\n");
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unsigned TargetSectionID = -1;
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if (Section == Obj.section_end()) {
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RelocationEntry RE(SectionID, Offset, RelType, 0, -1, 0, 0, 0, false, 0);
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addRelocationForSymbol(RE, TargetName);
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} else {
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if (auto TargetSectionIDOrErr =
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findOrEmitSection(Obj, *Section, Section->isText(), ObjSectionToID))
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TargetSectionID = *TargetSectionIDOrErr;
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else
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return TargetSectionIDOrErr.takeError();
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// We need to find out if the relocation is relative to a thumb function
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// so that we include the ISA selection bit when resolve the relocation
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bool IsTargetThumbFunc = isThumbFunc(Symbol, Obj, Section);
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switch (RelType) {
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default: llvm_unreachable("unsupported relocation type");
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case COFF::IMAGE_REL_ARM_ABSOLUTE:
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// This relocation is ignored.
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break;
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case COFF::IMAGE_REL_ARM_ADDR32: {
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RelocationEntry RE = RelocationEntry(
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SectionID, Offset, RelType, Addend, TargetSectionID,
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getSymbolOffset(*Symbol), 0, 0, false, 0, IsTargetThumbFunc);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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case COFF::IMAGE_REL_ARM_ADDR32NB: {
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RelocationEntry RE =
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RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID,
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getSymbolOffset(*Symbol), 0, 0, false, 0);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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case COFF::IMAGE_REL_ARM_SECTION: {
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RelocationEntry RE =
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RelocationEntry(TargetSectionID, Offset, RelType, 0);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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case COFF::IMAGE_REL_ARM_SECREL: {
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RelocationEntry RE = RelocationEntry(SectionID, Offset, RelType,
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getSymbolOffset(*Symbol) + Addend);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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case COFF::IMAGE_REL_ARM_MOV32T: {
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RelocationEntry RE = RelocationEntry(
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SectionID, Offset, RelType, Addend, TargetSectionID,
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getSymbolOffset(*Symbol), 0, 0, false, 0, IsTargetThumbFunc);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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case COFF::IMAGE_REL_ARM_BRANCH20T:
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case COFF::IMAGE_REL_ARM_BRANCH24T:
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case COFF::IMAGE_REL_ARM_BLX23T: {
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RelocationEntry RE =
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RelocationEntry(SectionID, Offset, RelType,
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getSymbolOffset(*Symbol) + Addend, true, 0);
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addRelocationForSection(RE, TargetSectionID);
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break;
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}
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}
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}
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return ++RelI;
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}
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void resolveRelocation(const RelocationEntry &RE, uint64_t Value) override {
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const auto Section = Sections[RE.SectionID];
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uint8_t *Target = Section.getAddressWithOffset(RE.Offset);
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int ISASelectionBit = RE.IsTargetThumbFunc ? 1 : 0;
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switch (RE.RelType) {
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default: llvm_unreachable("unsupported relocation type");
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case COFF::IMAGE_REL_ARM_ABSOLUTE:
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// This relocation is ignored.
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break;
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case COFF::IMAGE_REL_ARM_ADDR32: {
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// The target's 32-bit VA.
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uint64_t Result =
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RE.Sections.SectionA == static_cast<uint32_t>(-1)
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? Value
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: Sections[RE.Sections.SectionA].getLoadAddressWithOffset(RE.Addend);
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Result |= ISASelectionBit;
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assert(static_cast<int32_t>(Result) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(Result) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_ADDR32"
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<< " TargetSection: " << RE.Sections.SectionA
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<< " Value: " << format("0x%08" PRIx32, Result) << '\n');
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writeBytesUnaligned(Result, Target, 4);
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break;
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}
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case COFF::IMAGE_REL_ARM_ADDR32NB: {
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// The target's 32-bit RVA.
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// NOTE: use Section[0].getLoadAddress() as an approximation of ImageBase
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uint64_t Result = Sections[RE.Sections.SectionA].getLoadAddress() -
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Sections[0].getLoadAddress() + RE.Addend;
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assert(static_cast<int32_t>(Result) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(Result) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_ADDR32NB"
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<< " TargetSection: " << RE.Sections.SectionA
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<< " Value: " << format("0x%08" PRIx32, Result) << '\n');
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Result |= ISASelectionBit;
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writeBytesUnaligned(Result, Target, 4);
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break;
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}
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case COFF::IMAGE_REL_ARM_SECTION:
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// 16-bit section index of the section that contains the target.
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assert(static_cast<int32_t>(RE.SectionID) <= INT16_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(RE.SectionID) >= INT16_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_SECTION Value: " << RE.SectionID
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<< '\n');
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writeBytesUnaligned(RE.SectionID, Target, 2);
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break;
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case COFF::IMAGE_REL_ARM_SECREL:
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// 32-bit offset of the target from the beginning of its section.
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assert(static_cast<int32_t>(RE.Addend) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(RE.Addend) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_SECREL Value: " << RE.Addend
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<< '\n');
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writeBytesUnaligned(RE.Addend, Target, 2);
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break;
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case COFF::IMAGE_REL_ARM_MOV32T: {
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// 32-bit VA of the target applied to a contiguous MOVW+MOVT pair.
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uint64_t Result =
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Sections[RE.Sections.SectionA].getLoadAddressWithOffset(RE.Addend);
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assert(static_cast<int32_t>(Result) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(Result) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_MOV32T"
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<< " TargetSection: " << RE.Sections.SectionA
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<< " Value: " << format("0x%08" PRIx32, Result) << '\n');
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// MOVW(T3): |11110|i|10|0|1|0|0|imm4|0|imm3|Rd|imm8|
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// imm32 = zext imm4:i:imm3:imm8
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// MOVT(T1): |11110|i|10|1|1|0|0|imm4|0|imm3|Rd|imm8|
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// imm16 = imm4:i:imm3:imm8
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auto EncodeImmediate = [](uint8_t *Bytes, uint16_t Immediate) {
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Bytes[0] |= ((Immediate & 0xf000) >> 12);
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Bytes[1] |= ((Immediate & 0x0800) >> 11);
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Bytes[2] |= ((Immediate & 0x00ff) >> 0);
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Bytes[3] |= (((Immediate & 0x0700) >> 8) << 4);
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};
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EncodeImmediate(&Target[0],
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(static_cast<uint32_t>(Result) >> 00) | ISASelectionBit);
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EncodeImmediate(&Target[4], static_cast<uint32_t>(Result) >> 16);
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break;
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}
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case COFF::IMAGE_REL_ARM_BRANCH20T: {
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// The most significant 20-bits of the signed 21-bit relative displacement
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uint64_t Value =
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RE.Addend - (Sections[RE.SectionID].getLoadAddress() + RE.Offset) - 4;
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assert(static_cast<int32_t>(RE.Addend) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(RE.Addend) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_BRANCH20T"
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<< " Value: " << static_cast<int32_t>(Value) << '\n');
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static_cast<void>(Value);
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llvm_unreachable("unimplemented relocation");
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break;
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}
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case COFF::IMAGE_REL_ARM_BRANCH24T: {
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// The most significant 24-bits of the signed 25-bit relative displacement
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uint64_t Value =
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RE.Addend - (Sections[RE.SectionID].getLoadAddress() + RE.Offset) - 4;
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assert(static_cast<int32_t>(RE.Addend) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(RE.Addend) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_BRANCH24T"
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<< " Value: " << static_cast<int32_t>(Value) << '\n');
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static_cast<void>(Value);
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llvm_unreachable("unimplemented relocation");
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break;
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}
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case COFF::IMAGE_REL_ARM_BLX23T: {
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// The most significant 24-bits of the signed 25-bit relative displacement
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uint64_t Value =
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RE.Addend - (Sections[RE.SectionID].getLoadAddress() + RE.Offset) - 4;
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assert(static_cast<int32_t>(RE.Addend) <= INT32_MAX &&
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"relocation overflow");
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assert(static_cast<int32_t>(RE.Addend) >= INT32_MIN &&
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"relocation underflow");
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DEBUG(dbgs() << "\t\tOffset: " << RE.Offset
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<< " RelType: IMAGE_REL_ARM_BLX23T"
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<< " Value: " << static_cast<int32_t>(Value) << '\n');
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static_cast<void>(Value);
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llvm_unreachable("unimplemented relocation");
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break;
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}
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}
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}
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void registerEHFrames() override {}
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};
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}
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#endif
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