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llvm-mirror/test/CodeGen/MIR/X86/global-value-operands.mir
Alex Lorenz c21c095194 MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

llvm-svn: 244982
2015-08-13 23:10:16 +00:00

141 lines
3.1 KiB
YAML

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses global value operands correctly.
--- |
@G = external global i32
@0 = external global i32
define i32 @inc() {
entry:
%a = load i32, i32* @G
%b = add i32 %a, 1
ret i32 %b
}
define i32 @inc2() {
entry:
%a = load i32, i32* @0
%b = add i32 %a, 1
ret i32 %b
}
@.$0 = external global i32
@-_- = external global i32
@_-_a = external global i32
@$.-B = external global i32
define i32 @test() {
entry:
%a = load i32, i32* @.$0
store i32 %a, i32* @-_-
%b = load i32, i32* @_-_a
store i32 %b, i32* @$.-B
ret i32 %b
}
@"\01Hello@$%09 \\ World," = external global i32
define i32 @test2() {
entry:
%a = load i32, i32* @"\01Hello@$%09 \\ World,"
ret i32 %a
}
define i32 @test3() {
entry:
%a = load i32, i32* @.$0
store i32 %a, i32* @-_-
%b = load i32, i32* @_-_a
store i32 %b, i32* @$.-B
ret i32 %b
}
define i32 @tf() {
entry:
%a = load i32, i32* @G
%b = add i32 %a, 1
ret i32 %b
}
...
---
# CHECK: name: inc
name: inc
body: |
bb.0.entry:
; CHECK: %rax = MOV64rm %rip, 1, _, @G, _
%rax = MOV64rm %rip, 1, _, @G, _
%eax = MOV32rm %rax, 1, _, 0, _
%eax = INC32r %eax, implicit-def %eflags
RETQ %eax
...
---
# CHECK: name: inc2
name: inc2
body: |
bb.0.entry:
; CHECK: %rax = MOV64rm %rip, 1, _, @0, _
%rax = MOV64rm %rip, 1, _, @0, _
%eax = MOV32rm %rax, 1, _, 0, _
%eax = INC32r %eax, implicit-def %eflags
RETQ %eax
...
---
name: test
body: |
bb.0.entry:
; CHECK: , @".$0",
; CHECK: , @-_-,
; CHECK: , @_-_a,
; CHECK: , @"$.-B",
%rax = MOV64rm %rip, 1, _, @.$0, _
%eax = MOV32rm killed %rax, 1, _, 0, _
%rcx = MOV64rm %rip, 1, _, @-_-, _
MOV32mr killed %rcx, 1, _, 0, _, killed %eax
%rax = MOV64rm %rip, 1, _, @_-_a, _
%eax = MOV32rm killed %rax, 1, _, 0, _
%rcx = MOV64rm %rip, 1, _, @$.-B, _
MOV32mr killed %rcx, 1, _, 0, _, %eax
RETQ %eax
...
---
name: test2
body: |
bb.0.entry:
; CHECK: , @"\01Hello@$%09 \5C World,",
%rax = MOV64rm %rip, 1, _, @"\01Hello@$%09 \\ World,", _
%eax = MOV32rm killed %rax, 1, _, 0, _
RETQ %eax
...
---
# CHECK: name: test3
name: test3
body: |
bb.0.entry:
; CHECK: , @".$0",
; CHECK: , @-_-,
; CHECK: , @_-_a + 4,
; CHECK: , @"$.-B" - 8,
%rax = MOV64rm %rip, 1, _, @.$0 + 0, _
%eax = MOV32rm killed %rax, 1, _, 0, _
%rcx = MOV64rm %rip, 1, _, @-_- - 0, _
MOV32mr killed %rcx, 1, _, 0, _, killed %eax
%rax = MOV64rm %rip, 1, _, @_-_a + 4, _
%eax = MOV32rm killed %rax, 1, _, 0, _
%rcx = MOV64rm %rip, 1, _, @$.-B - 8, _
MOV32mr killed %rcx, 1, _, 0, _, %eax
RETQ %eax
...
---
# CHECK: name: tf
name: tf
body: |
bb.0.entry:
; CHECK: %rax = MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @G, _
%rax = MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @G, _
%eax = MOV32rm %rax, 1, _, 0, _
%eax = INC32r %eax, implicit-def %eflags
RETQ %eax
...