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https://github.com/RPCS3/llvm-mirror.git
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1308a36647
llvm-svn: 84459
59 lines
2.1 KiB
LLVM
59 lines
2.1 KiB
LLVM
; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
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; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck --check-prefix=YONAH %s
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define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
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; CHECK: pshufd
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; CHECK-YONAH: pshufd
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%C = shufflevector <4 x i32> %A, <4 x i32> undef, <4 x i32> < i32 1, i32 2, i32 3, i32 0 >
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ret <4 x i32> %C
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}
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define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) nounwind {
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; CHECK: palignr
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; CHECK-YONAH: shufps
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%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 3, i32 4 >
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ret <4 x i32> %C
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}
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define <4 x i32> @test3(<4 x i32> %A, <4 x i32> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 undef, i32 4 >
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ret <4 x i32> %C
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}
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define <4 x i32> @test4(<4 x i32> %A, <4 x i32> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
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ret <4 x i32> %C
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}
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define <4 x float> @test5(<4 x float> %A, <4 x float> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
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ret <4 x float> %C
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}
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define <8 x i16> @test6(<8 x i16> %A, <8 x i16> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 3, i32 4, i32 undef, i32 6, i32 7, i32 8, i32 9, i32 10 >
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ret <8 x i16> %C
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}
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define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 6, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12 >
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ret <8 x i16> %C
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}
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define <8 x i16> @test8(<8 x i16> %A, <8 x i16> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0 >
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ret <8 x i16> %C
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}
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define <16 x i8> @test9(<16 x i8> %A, <16 x i8> %B) nounwind {
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; CHECK: palignr
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%C = shufflevector <16 x i8> %A, <16 x i8> %B, <16 x i32> < i32 5, i32 6, i32 7, i32 undef, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20 >
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ret <16 x i8> %C
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}
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