Jakob Stoklund Olesen 2611cc2520 Fix -widen-vmovs liveness issues. ... When widening a copy, we are reading a larger register that may not be live. Use an <undef> flag to tell the register scavenger and machine code verifier that we know the value isn't defined. We now widen: %S6<def> = COPY %S4<kill>, %D3<imp-def> into: %D3<def> = VMOVD %D2<undef>, pred:14, pred:%noreg, %S4<imp-use,kill> This also keeps the <kill> flag on %S4 so we don't inadvertently kill a live value in %S5. Finally, ensure that ARMBaseInstrInfo::setExecutionDomain() preserves the <undef> flag when converting VMOVD to VORR. llvm-svn: 141746		2011-10-12 00:06:23 +00:00
..
Alpha	Convert more tests over to the new atomic instructions.	2011-09-26 21:30:17 +00:00
ARM	Fix -widen-vmovs liveness issues.	2011-10-12 00:06:23 +00:00
Blackfin
CBackend	Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported	2011-09-26 06:44:27 +00:00
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval	2011-09-26 06:13:20 +00:00
MBlaze
Mips	Test cases for 64-bit load and store instructions.	2011-10-11 01:52:31 +00:00
MSP430
PowerPC	Convert more tests over to the new atomic instructions.	2011-09-26 21:30:17 +00:00
PTX	PTX: Add new patterns for bitconvert and any_extend	2011-09-29 01:13:12 +00:00
SPARC
SystemZ
Thumb	Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo...	2011-10-11 21:40:47 +00:00
Thumb2	ARM Darwin default relocation model is PIC.	2011-09-30 17:41:35 +00:00
X86	Make this test more specific. There are 3 stats that matched "machine-licm".	2011-10-11 23:34:31 +00:00
XCore	Associate a MemOperand with LDWCP nodes introduced during ISel.	2011-09-12 14:43:23 +00:00