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1e82259f07
These are pre-UAL syntax, and we don't support any other pre-UAL instructions, with the exception of FLDMX/FSTMX, which don't have a UAL equivalent. Therefore there's no reason to keep them or their AsmParser hacks around. With the AsmParser hacks removed, the FLDMX and FSTMX instructions get the same operand diagnostics as the UAL instructions. Differential revision: https://reviews.llvm.org/D39196 llvm-svn: 318777
47 lines
1.4 KiB
ArmAsm
47 lines
1.4 KiB
ArmAsm
@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null %s 2>&1 \
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@ RUN: | FileCheck %s
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.syntax unified
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.fpu vfp
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.type aliases,%function
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aliases:
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fstmeax sp!, {s0}
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fldmfdx sp!, {s0}
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fstmfdx sp!, {s0}
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fldmeax sp!, {s0}
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@ CHECK-LABEL: aliases
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmeax sp!, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fldmfdx sp!, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmfdx sp!, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fldmeax sp!, {s0}
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@ CHECK: ^
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fstmiaxcs r0, {s0}
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fstmiaxhs r0, {s0}
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fstmiaxls r0, {s0}
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fstmiaxvs r0, {s0}
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmiaxcs r0, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmiaxhs r0, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmiaxls r0, {s0}
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@ CHECK: ^
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@ CHECK: error: operand must be a list of registers in range [d0, d31]
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@ CHECK: fstmiaxvs r0, {s0}
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@ CHECK: ^
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