Bill Schmidt ec1edc24b0 Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0. ... When converting a signed 32-bit integer to double-precision floating point on hardware without a lfiwax instruction, we have to instead use a lfd followed by fcfid. We were erroneously offsetting the address by 4 bytes in preparation for either a lfiwax or lfiwzx when generating the lfd. This fixes that silly error. This was not caught in the test suite since the conversion tests were run with -mcpu=pwr7, which implies availability of lfiwax. I've added another test case for older hardware that checks the code we expect in the absence of lfiwax and other flavors of fcfid. There are fewer tests in this test case because we punt to DAG selection in more cases on older hardware. (We must generate complex fiddly sequences in those cases, and there is marginal benefit in duplicating that logic in fast-isel.) llvm-svn: 204155		2014-03-18 14:32:50 +00:00
..
AArch64	Make DAGCombiner work on vector bitshifts with constant splat vectors.	2014-03-17 18:58:01 +00:00
ARM	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
CPP
Generic	CommandLine: Exit successfully for -version and -help	2014-02-28 19:08:01 +00:00
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
MSP430
NVPTX	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
PowerPC	Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.	2014-03-18 14:32:50 +00:00
R600	CodeGen/R600/v_cndmask.ll: Relax an expression to unbreak msvcrt.	2014-03-18 06:17:22 +00:00
SPARC	Remove the linker_private and linker_private_weak linkages.	2014-03-13 23:18:37 +00:00
SystemZ	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
Thumb	Add triples to try to fix the windows bots.	2014-02-13 16:49:47 +00:00
Thumb2	ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block	2014-02-26 11:27:28 +00:00
X86	Make DAGCombiner work on vector bitshifts with constant splat vectors.	2014-03-17 18:58:01 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00