1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Evan Cheng b5fadc47e0 Allow ARM if-converter to be run after post allocation scheduling.
- This fixed a number of bugs in if-converter, tail merging, and post-allocation
  scheduler. If-converter now runs branch folding / tail merging first to
  maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
  register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
  change the instruction ordering in the IT block (since IT mask has been
  finalized). It also ensures no other instructions can be scheduled between
  instructions in the IT block.

This is not yet enabled.

llvm-svn: 106344
2010-06-18 23:09:54 +00:00
..
Alpha
ARM Allow ARM if-converter to be run after post allocation scheduling. 2010-06-18 23:09:54 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC
SPARC
SystemZ
Thumb
Thumb2 Allow ARM if-converter to be run after post allocation scheduling. 2010-06-18 23:09:54 +00:00
X86 Don't maintain a set of deleted nodes; instead, use a HandleSDNode 2010-06-18 01:24:29 +00:00
XCore