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d597eb64ea
This adds two new system registers, used to generate random numbers. This is an optional extension to v8.5-A, and will be controlled by the "+rng" modifier of the -march= and -mcpu= options. Patch by Pablo Barrio! Differential revision: https://reviews.llvm.org/D52481 llvm-svn: 343217
18 lines
412 B
ArmAsm
18 lines
412 B
ArmAsm
// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+rand < %s 2>&1| FileCheck %s
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mrs rndr
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mrs rndrrs
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// CHECK: invalid operand for instruction
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// CHECK-NEXT: rndr
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// CHECK: invalid operand for instruction
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// CHECK-NEXT: rndrrs
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mrs rndr, x0
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mrs rndrrs, x1
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// CHECK: invalid operand for instruction
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// CHECK-NEXT: rndr
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// CHECK: invalid operand for instruction
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// CHECK-NEXT: rndrrs
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