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7cd663b80c
Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292154
56 lines
2.4 KiB
LLVM
56 lines
2.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define void @jbd2_journal_commit_transaction(i32 %input1, i32* %input2, i32* %input3, i8** %input4) #0 {
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entry:
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br label %while.body392
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while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph
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%0 = load i8*, i8** %input4, align 8
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%add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72
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%b_state.i.i1314 = bitcast i8* %add.ptr399 to i64*
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%ivar = add i32 %input1, 1
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%tobool.i1316 = icmp eq i32 %input1, 0
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br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %while.end418
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wait_on_buffer.exit1319: ; preds = %while.body392
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%1 = load volatile i64, i64* %b_state.i.i1314, align 8
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%conv.i.i1322 = and i64 %1, 1
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%lnot404 = icmp eq i64 %conv.i.i1322, 0
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%.err.4 = select i1 %lnot404, i32 -5, i32 %input1
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%2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #0
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store i8* %0, i8** %input4, align 8
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%cmp.i1312 = icmp eq i32* %input2, %input3
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br i1 %cmp.i1312, label %while.end418, label %while.body392
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while.end418: ; preds = %wait_on_buffer.exit1319, %do.body378
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%err.4.lcssa = phi i32 [ %ivar, %while.body392 ], [ %.err.4, %wait_on_buffer.exit1319 ]
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%tobool419 = icmp eq i32 %err.4.lcssa, 0
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br i1 %tobool419, label %if.end421, label %if.then420
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; CHECK-LABEL: @jbd2_journal_commit_transaction
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; CHECK-NO-ISEL-LABEL: @jbd2_journal_commit_transaction
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; CHECK: andi.
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; CHECK: crmove [[REG:[0-9]+]], 1
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; CHECK: stdcx.
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; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, [[REG]]
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; CHECK-NO-ISEL: bc 12, 20, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 4, 7, 0
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; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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; CHECK-NO-ISEL: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 4, 3, 0
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if.then420: ; preds = %while.end418
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unreachable
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if.end421: ; preds = %while.end418
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unreachable
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}
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attributes #0 = { nounwind }
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