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GlobalISel
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[GlobalISel][Legalizer] Convert the FP constants to the right APFloat type for G_FCONSTANT.
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2018-01-27 07:07:20 +00:00 |
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128bit_load_store.ll
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a57-csel.ll
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aarch64_f16_be.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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aarch64_tree_tests.ll
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aarch64_win64cc_vararg.ll
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aarch64-2014-08-11-MachineCombinerCrash.ll
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aarch64-2014-12-02-combine-soften.ll
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aarch64-a57-fp-load-balancing.ll
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
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2017-12-07 10:40:31 +00:00 |
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aarch64-address-type-promotion-assertion.ll
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aarch64-address-type-promotion.ll
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aarch64-addv.ll
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aarch64-be-bv.ll
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aarch64-codegen-prepare-atp.ll
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aarch64-combine-fmul-fsub.mir
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[AArch64] Fix -mcpu option in aarch64-combine-fmul-fsub.mir (NFC)
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2018-01-05 11:17:48 +00:00 |
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aarch64-DAGCombine-findBetterNeighborChains-crash.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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aarch64-dynamic-stack-layout.ll
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aarch64-fix-cortex-a53-835769.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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aarch64-fold-lslfast.ll
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aarch64-gep-opt.ll
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aarch64-loop-gep-opt.ll
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aarch64-minmaxv.ll
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aarch64-named-reg-w18.ll
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aarch64-named-reg-x18.ll
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aarch64-neon-v1i1-setcc.ll
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aarch64-smax-constantfold.ll
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aarch64-smull.ll
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aarch64-stp-cluster.ll
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[CodeGen] Print RegClasses on MI in verbose mode
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2018-01-18 17:59:06 +00:00 |
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aarch64-tbz.ll
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aarch64-tryBitfieldInsertOpFromOr-crash.ll
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aarch64-vcvtfp2fxs-combine.ll
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aarch64-wide-shuffle.ll
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aarch-multipart.ll
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adc.ll
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addcarry-crash.ll
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addsub_ext.ll
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addsub-shifted.ll
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addsub.ll
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alloca.ll
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analyze-branch.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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analyzecmp.ll
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and-mask-removal.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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and-sink.ll
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andandshift.ll
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argument-blocks.ll
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arm64-2011-03-09-CPSRSpill.ll
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arm64-2011-03-17-AsmPrinterCrash.ll
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arm64-2011-03-21-Unaligned-Frame-Index.ll
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arm64-2011-04-21-CPSRBug.ll
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arm64-2011-10-18-LdStOptBug.ll
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arm64-2012-01-11-ComparisonDAGCrash.ll
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arm64-2012-05-07-DAGCombineVectorExtract.ll
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arm64-2012-05-07-MemcpyAlignBug.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-2012-05-09-LOADgot-bug.ll
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arm64-2012-05-22-LdStOptBug.ll
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
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2017-12-07 10:40:31 +00:00 |
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arm64-2012-06-06-FPToUI.ll
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arm64-2012-07-11-InstrEmitterBug.ll
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arm64-2013-01-13-ffast-fcmp.ll
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arm64-2013-01-23-frem-crash.ll
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arm64-2013-01-23-sext-crash.ll
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arm64-2013-02-12-shufv8i8.ll
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arm64-aapcs-be.ll
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arm64-aapcs.ll
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arm64-abi_align.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-abi-varargs.ll
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[DAG] Teach findBaseOffset to interpret indexes of indexed memory operations
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2018-01-26 16:51:27 +00:00 |
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arm64-abi.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-addp.ll
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arm64-addr-mode-folding.ll
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arm64-addr-type-promotion.ll
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arm64-addrmode.ll
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arm64-AdvSIMD-Scalar.ll
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[AArch64][TableGen] Skip tied result operands for InstAlias
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2017-11-20 14:36:40 +00:00 |
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arm64-alloc-no-stack-realign.ll
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arm64-alloca-frame-pointer-offset.ll
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arm64-andCmpBrToTBZ.ll
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arm64-ands-bad-peephole.ll
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arm64-AnInfiniteLoopInDAGCombine.ll
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arm64-anyregcc-crash.ll
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arm64-anyregcc.ll
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arm64-arith-saturating.ll
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arm64-arith.ll
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arm64-arm64-dead-def-elimination-flag.ll
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arm64-atomic-128.ll
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arm64-atomic.ll
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Fix some misc. -enable-var-scope violations
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2017-11-13 01:47:52 +00:00 |
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arm64-basic-pic.ll
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arm64-bcc.ll
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arm64-big-endian-bitconverts.ll
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[AArch64] Avoid unnecessary vector byte-swapping in big-endian
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2018-01-24 14:13:47 +00:00 |
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arm64-big-endian-eh.ll
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arm64-big-endian-varargs.ll
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arm64-big-endian-vector-callee.ll
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arm64-big-endian-vector-caller.ll
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arm64-big-imm-offsets.ll
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arm64-big-stack.ll
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arm64-bitfield-extract.ll
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arm64-blockaddress.ll
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arm64-build-vector.ll
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[AArch64] Improve code generation of vector build
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2018-01-04 21:43:12 +00:00 |
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arm64-builtins-linux.ll
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arm64-call-tailcalls.ll
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arm64-cast-opt.ll
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arm64-ccmp-heuristics.ll
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arm64-ccmp.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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arm64-clrsb.ll
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arm64-coalesce-ext.ll
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arm64-coalescing-MOVi32imm.ll
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arm64-code-model-large-abs.ll
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arm64-codegen-prepare-extload.ll
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Fix some misc. -enable-var-scope violations
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2017-11-13 01:47:52 +00:00 |
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arm64-collect-loh-garbage-crash.ll
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arm64-collect-loh-str.ll
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arm64-collect-loh.ll
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arm64-complex-copy-noneon.ll
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arm64-complex-ret.ll
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[ARM][AArch64][DAG] Reenable post-legalize store merge
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2017-12-06 15:30:13 +00:00 |
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arm64-const-addr.ll
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arm64-convert-v4f64.ll
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arm64-copy-tuple.ll
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arm64-crc32.ll
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arm64-crypto.ll
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arm64-cse.ll
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arm64-csel.ll
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arm64-csldst-mmo.ll
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[CodeGen] Print frame-setup/destroy flags in -debug output like we do in MIR
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2018-01-09 16:11:51 +00:00 |
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arm64-cvt.ll
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arm64-dagcombiner-convergence.ll
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arm64-dagcombiner-dead-indexed-load.ll
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arm64-dagcombiner-load-slicing.ll
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arm64-dead-def-frame-index.ll
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arm64-dead-register-def-bug.ll
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
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2017-12-07 10:40:31 +00:00 |
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arm64-detect-vec-redux.ll
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arm64-dup.ll
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[AArch64][TableGen] Skip tied result operands for InstAlias
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2017-11-20 14:36:40 +00:00 |
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arm64-early-ifcvt.ll
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arm64-elf-calls.ll
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arm64-elf-constpool.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-elf-globals.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-EXT-undef-mask.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-ext.ll
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arm64-extend-int-to-fp.ll
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arm64-extend.ll
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arm64-extern-weak.ll
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arm64-extload-knownzero.ll
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arm64-extract_subvector.ll
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arm64-extract.ll
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arm64-fast-isel-addr-offset.ll
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arm64-fast-isel-alloca.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-br.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-call.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-conversion-fallback.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-conversion.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-fcmp.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-gv.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-icmp.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-indirectbr.ll
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arm64-fast-isel-intrinsic.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-fast-isel-materialize.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-noconvert.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-rem.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-ret.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fast-isel-store.ll
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arm64-fast-isel.ll
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[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
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2018-01-02 16:30:47 +00:00 |
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arm64-fastcc-tailcall.ll
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arm64-fastisel-gep-promote-before-add.ll
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arm64-fcmp-opt.ll
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AArch64: work around how Cyclone handles "movi.2d vD, #0".
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2017-12-18 10:36:00 +00:00 |
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arm64-fcopysign.ll
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arm64-fixed-point-scalar-cvt-dagcombine.ll
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arm64-fma-combine-with-fpfusion.ll
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arm64-fma-combines.ll
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arm64-fmadd.ll
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arm64-fmax-safe.ll
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arm64-fmax.ll
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arm64-fminv.ll
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arm64-fml-combines.ll
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arm64-fmuladd.ll
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arm64-fold-address.ll
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arm64-fold-lsl.ll
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arm64-fp128-folding.ll
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arm64-fp128.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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arm64-fp-contract-zero.ll
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arm64-fp-imm.ll
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arm64-fp.ll
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arm64-frame-index.ll
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arm64-global-address.ll
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arm64-hello.ll
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Revert "AArch64: Omit callframe setup/destroy when not necessary"
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2018-01-29 19:56:42 +00:00 |
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arm64-i16-subreg-extract.ll
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arm64-icmp-opt.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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arm64-illegal-float-ops.ll
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arm64-indexed-memory.ll
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arm64-indexed-vector-ldst-2.ll
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arm64-indexed-vector-ldst.ll
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[CodeGen] Unify MBB reference format in both MIR and debug output
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2017-12-04 17:18:51 +00:00 |
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arm64-inline-asm-error-I.ll
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arm64-inline-asm-error-J.ll
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arm64-inline-asm-error-K.ll
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arm64-inline-asm-error-L.ll
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arm64-inline-asm-error-M.ll
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arm64-inline-asm-error-N.ll
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arm64-inline-asm-zero-reg-error.ll
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arm64-inline-asm.ll
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arm64-join-reserved.ll
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arm64-jumptable.ll
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[SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking.
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2017-12-21 01:22:13 +00:00 |
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arm64-large-frame.ll
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arm64-ld1.ll
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arm64-ld-from-st.ll
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arm64-ldp-aa.ll
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arm64-ldp-cluster.ll
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[AArch64] Update test cases for Exynos M3
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2018-01-30 15:40:27 +00:00 |
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arm64-ldp.ll
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arm64-ldst-unscaled-pre-post.mir
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arm64-ldur.ll
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arm64-ldxr-stxr.ll
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arm64-leaf.ll
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arm64-long-shift.ll
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arm64-memcpy-inline.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-memset-inline.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-memset-to-bzero.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-misaligned-memcpy-inline.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-misched-basic-A53.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-misched-basic-A57.ll
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Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
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2018-01-19 17:13:12 +00:00 |
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arm64-misched-forwarding-A53.ll
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[CodeGen] Print RegClasses on MI in verbose mode
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2018-01-18 17:59:06 +00:00 |
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arm64-misched-memdep-bug.ll
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[CodeGen] Print RegClasses on MI in verbose mode
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2018-01-18 17:59:06 +00:00 |
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arm64-misched-multimmo.ll
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[MachineOperand][MIR] Add isRenamable to MachineOperand.
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2017-12-12 17:53:59 +00:00 |
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arm64-movi.ll
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arm64-mul.ll
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arm64-named-reg-alloc.ll
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arm64-named-reg-notareg.ll
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arm64-narrow-st-merge.ll
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[ARM][AArch64][DAG] Reenable post-legalize store merge
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2017-12-06 15:30:13 +00:00 |
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arm64-neg.ll
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arm64-neon-2velem-high.ll
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arm64-neon-2velem.ll
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[AArch64] Update test cases for Exynos M3
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2018-01-30 15:40:27 +00:00 |
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arm64-neon-3vdiff.ll
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arm64-neon-aba-abd.ll
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arm64-neon-across.ll
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arm64-neon-add-pairwise.ll
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arm64-neon-add-sub.ll
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arm64-neon-compare-instructions.ll
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arm64-neon-copy.ll
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[AArch64][TableGen] Skip tied result operands for InstAlias
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2017-11-20 14:36:40 +00:00 |
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arm64-neon-copyPhysReg-tuple.ll
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arm64-neon-mul-div.ll
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arm64-neon-scalar-by-elem-mul.ll
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arm64-neon-select_cc.ll
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arm64-neon-simd-ldst-one.ll
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arm64-neon-simd-shift.ll
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arm64-neon-simd-vget.ll
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arm64-neon-v1i1-setcc.ll
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arm64-neon-v8.1a.ll
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arm64-neon-vector-list-spill.ll
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arm64-nvcast.ll
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arm64-opt-remarks-lazy-bfi.ll
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[MC] Adding code padding for performance stability - infrastructure. NFC.
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2017-10-24 06:16:03 +00:00 |
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arm64-patchpoint-scratch-regs.ll
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arm64-patchpoint-webkit_jscc.ll
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arm64-patchpoint.ll
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arm64-pic-local-symbol.ll
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arm64-platform-reg.ll
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arm64-popcnt.ll
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|
arm64-prefetch.ll
|
|
|
|
arm64-promote-const.ll
|
|
|
|
arm64-redzone.ll
|
|
|
|
arm64-reg-copy-noneon.ll
|
|
|
|
arm64-register-offset-addressing.ll
|
|
|
|
arm64-register-pairing.ll
|
|
|
|
arm64-regress-f128csel-flags.ll
|
|
|
|
arm64-regress-interphase-shift.ll
|
|
|
|
arm64-regress-opt-cmp.mir
|
MIR: Print the register class or bank in vreg defs
|
2017-10-24 18:04:54 +00:00 |
|
arm64-return-vector.ll
|
|
|
|
arm64-returnaddr.ll
|
|
|
|
arm64-rev.ll
|
|
|
|
arm64-rounding.ll
|
|
|
|
arm64-scaled_iv.ll
|
|
|
|
arm64-scvt.ll
|
Fix some misc. -enable-var-scope violations
|
2017-11-13 01:47:52 +00:00 |
|
arm64-setcc-int-to-fp-combine.ll
|
|
|
|
arm64-shifted-sext.ll
|
|
|
|
arm64-shrink-v1i64.ll
|
|
|
|
arm64-shrink-wrapping.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
arm64-simd-scalar-to-vector.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
arm64-simplest-elf.ll
|
|
|
|
arm64-sincos.ll
|
|
|
|
arm64-sitofp-combine-chains.ll
|
|
|
|
arm64-sli-sri-opt.ll
|
|
|
|
arm64-smaxv.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-sminv.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-spill-lr.ll
|
|
|
|
arm64-spill-remarks-treshold-hotness.ll
|
[opt-remarks] If hotness threshold is set, ignore remarks without hotness
|
2017-12-01 20:41:38 +00:00 |
|
arm64-spill-remarks.ll
|
|
|
|
arm64-spill.ll
|
|
|
|
arm64-sqshl-uqshl-i64Contant.ll
|
|
|
|
arm64-st1.ll
|
[AArch64] Avoid SIMD interleaved store instruction for Exynos.
|
2017-12-08 00:58:49 +00:00 |
|
arm64-stack-no-frame.ll
|
|
|
|
arm64-stackmap-nops.ll
|
|
|
|
arm64-stackmap.ll
|
|
|
|
arm64-stackpointer.ll
|
|
|
|
arm64-stacksave.ll
|
|
|
|
arm64-storebytesmerge.ll
|
[ARM][AArch64][DAG] Reenable post-legalize store merge
|
2017-12-06 15:30:13 +00:00 |
|
arm64-stp-aa.ll
|
[NFC] fix trivial typos in comments
|
2018-01-24 05:04:35 +00:00 |
|
arm64-stp.ll
|
AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag
|
2018-01-24 00:39:53 +00:00 |
|
arm64-strict-align.ll
|
|
|
|
arm64-stur.ll
|
AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag
|
2018-01-24 00:39:53 +00:00 |
|
arm64-subsections.ll
|
|
|
|
arm64-subvector-extend.ll
|
|
|
|
arm64-summary-remarks.ll
|
|
|
|
arm64-swizzle-tbl-i16-layout.ll
|
|
|
|
arm64-tbl.ll
|
|
|
|
arm64-this-return.ll
|
|
|
|
arm64-tls-darwin.ll
|
|
|
|
arm64-tls-dynamic-together.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
arm64-tls-dynamics.ll
|
|
|
|
arm64-tls-execs.ll
|
|
|
|
arm64-trap.ll
|
|
|
|
arm64-triv-disjoint-mem-access.ll
|
|
|
|
arm64-trn.ll
|
|
|
|
arm64-trunc-store.ll
|
|
|
|
arm64-umaxv.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-uminv.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-umov.ll
|
|
|
|
arm64-unaligned_ldst.ll
|
|
|
|
arm64-uzp.ll
|
|
|
|
arm64-vaargs.ll
|
|
|
|
arm64-vabs.ll
|
|
|
|
arm64-vadd.ll
|
|
|
|
arm64-vaddlv.ll
|
|
|
|
arm64-vaddv.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-variadic-aapcs.ll
|
[ARM][AArch64][DAG] Reenable post-legalize store merge
|
2017-12-06 15:30:13 +00:00 |
|
arm64-vbitwise.ll
|
|
|
|
arm64-vclz.ll
|
|
|
|
arm64-vcmp.ll
|
|
|
|
arm64-vcnt.ll
|
|
|
|
arm64-vcombine.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
arm64-vcvt_f32_su32.ll
|
|
|
|
arm64-vcvt_f.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
arm64-vcvt_n.ll
|
|
|
|
arm64-vcvt_su32_f32.ll
|
|
|
|
arm64-vcvt.ll
|
|
|
|
arm64-vcvtxd_f32_f64.ll
|
|
|
|
arm64-vecCmpBr.ll
|
|
|
|
arm64-vecFold.ll
|
|
|
|
arm64-vector-ext.ll
|
|
|
|
arm64-vector-imm.ll
|
|
|
|
arm64-vector-insertion.ll
|
[AArch64] Improve code generation of vector build
|
2018-01-04 21:43:12 +00:00 |
|
arm64-vector-ldst.ll
|
|
|
|
arm64-vext_reverse.ll
|
|
|
|
arm64-vext.ll
|
|
|
|
arm64-vfloatintrinsics.ll
|
|
|
|
arm64-vhadd.ll
|
|
|
|
arm64-vhsub.ll
|
|
|
|
arm64-virtual_base.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
arm64-vmax.ll
|
|
|
|
arm64-vminmaxnm.ll
|
|
|
|
arm64-vmovn.ll
|
|
|
|
arm64-vmul.ll
|
|
|
|
arm64-volatile.ll
|
|
|
|
arm64-vpopcnt.ll
|
|
|
|
arm64-vqadd.ll
|
|
|
|
arm64-vqsub.ll
|
|
|
|
arm64-vselect.ll
|
|
|
|
arm64-vsetcc_fp.ll
|
|
|
|
arm64-vshift.ll
|
|
|
|
arm64-vshr.ll
|
|
|
|
arm64-vshuffle.ll
|
|
|
|
arm64-vsqrt.ll
|
|
|
|
arm64-vsra.ll
|
|
|
|
arm64-vsub.ll
|
|
|
|
arm64-weak-reference.ll
|
|
|
|
arm64-xaluo.ll
|
|
|
|
arm64-zero-cycle-regmov.ll
|
|
|
|
arm64-zero-cycle-zeroing.ll
|
AArch64: fix one more place movi.2d could be created.
|
2017-12-20 10:45:39 +00:00 |
|
arm64-zeroreg.ll
|
|
|
|
arm64-zext.ll
|
|
|
|
arm64-zextload-unscaled.ll
|
|
|
|
arm64-zip.ll
|
|
|
|
asm-large-immediate.ll
|
|
|
|
asm-print-comments.ll
|
|
|
|
assertion-rc-mismatch.ll
|
|
|
|
atomic-ops-lse.ll
|
[AArch64] Generate the CASP instruction for 128-bit cmpxchg
|
2018-01-29 09:18:37 +00:00 |
|
atomic-ops-not-barriers.ll
|
|
|
|
atomic-ops.ll
|
|
|
|
basic-pic.ll
|
|
|
|
bics.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
big-callframe.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
bitcast-v2i8.ll
|
|
|
|
bitcast.ll
|
|
|
|
bitfield-extract.ll
|
AArch64: get type from correct result when forming BFX
|
2018-01-23 15:11:27 +00:00 |
|
bitfield-insert-0.ll
|
|
|
|
bitfield-insert.ll
|
AArch64: get type from correct result when forming BFI/BFM
|
2018-01-23 14:37:03 +00:00 |
|
bitfield.ll
|
|
|
|
bitreverse.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
blockaddress.ll
|
|
|
|
bool-loads.ll
|
|
|
|
br-cond-not-merge.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
br-to-eh-lpad.ll
|
|
|
|
br-undef-cond.ll
|
|
|
|
branch-folder-merge-mmos.ll
|
|
|
|
branch-relax-alignment.ll
|
|
|
|
branch-relax-asm.ll
|
|
|
|
branch-relax-bcc.ll
|
|
|
|
branch-relax-cbz.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
breg.ll
|
|
|
|
bswap-known-bits.ll
|
|
|
|
build-one-lane.ll
|
[AArch64] Improve code generation of vector build
|
2018-01-04 21:43:12 +00:00 |
|
callee-save.ll
|
|
|
|
ccmp-successor-probs.mir
|
|
|
|
cfi_restore.mir
|
[AsmPrinterDwarf] Add support for .cfi_restore directive
|
2017-11-02 12:00:58 +00:00 |
|
chkstk.ll
|
[AArch64] Implement stack probing for windows
|
2017-12-20 06:51:45 +00:00 |
|
cmp-const-max.ll
|
|
|
|
cmp-frameindex.ll
|
AArch64: account for possible frame index operand in compares.
|
2017-10-17 21:43:52 +00:00 |
|
cmpwithshort.ll
|
|
|
|
cmpxchg-idioms.ll
|
[SimplifyCFG] use pass options and remove the latesimplifycfg pass
|
2017-10-28 18:43:07 +00:00 |
|
cmpxchg-O0.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
code-model-large-abs.ll
|
|
|
|
combine-and-like.ll
|
[DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZExtValue
|
2017-12-26 23:27:44 +00:00 |
|
combine-comparisons-by-cse.ll
|
|
|
|
compare-branch.ll
|
|
|
|
compiler-ident.ll
|
|
|
|
complex-copy-noneon.ll
|
|
|
|
complex-fp-to-int.ll
|
|
|
|
complex-int-to-fp.ll
|
|
|
|
concat_vector-scalar-combine.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
concat_vector-truncate-combine.ll
|
|
|
|
concat_vector-truncated-scalar-combine.ll
|
|
|
|
cond-br-tuning.ll
|
|
|
|
cond-sel-value-prop.ll
|
|
|
|
cond-sel.ll
|
|
|
|
cpus.ll
|
|
|
|
csel-zero-float.ll
|
|
|
|
cxx-tlscc.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
dag-combine-invaraints.ll
|
|
|
|
dag-combine-mul-shl.ll
|
|
|
|
dag-combine-select.ll
|
|
|
|
dag-numsignbits.ll
|
|
|
|
directcond.ll
|
|
|
|
div_minsize.ll
|
|
|
|
divrem.ll
|
|
|
|
dllexport.ll
|
[CodeGen] Hoist common AsmPrinter code out of X86, ARM, and AArch64
|
2018-01-17 23:55:23 +00:00 |
|
dllimport.ll
|
[GlobalISel] Bail out on calls to dllimported functions
|
2018-01-30 19:50:58 +00:00 |
|
dont-take-over-the-world.ll
|
|
|
|
dp1.ll
|
|
|
|
dp2.ll
|
|
|
|
dp-3source.ll
|
|
|
|
dwarf-cfi.ll
|
[AArch64] Use dwarf exception handling on MinGW
|
2017-11-03 07:33:20 +00:00 |
|
eliminate-trunc.ll
|
|
|
|
emutls_generic.ll
|
[AArch64] Allow using emulated tls on platforms other than ELF
|
2017-12-04 09:09:04 +00:00 |
|
emutls.ll
|
|
|
|
eon.ll
|
|
|
|
extern-weak.ll
|
|
|
|
extract.ll
|
|
|
|
f16-convert.ll
|
|
|
|
f16-imm.ll
|
|
|
|
f16-instructions.ll
|
|
|
|
fadd-combines.ll
|
|
|
|
falkor-hwpf-fix.ll
|
|
|
|
falkor-hwpf-fix.mir
|
|
|
|
falkor-hwpf.ll
|
|
|
|
fast-isel-address-extends.ll
|
|
|
|
fast-isel-addressing-modes.ll
|
|
|
|
fast-isel-assume.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
fast-isel-atomic.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
fast-isel-branch_weights.ll
|
|
|
|
fast-isel-branch-cond-mask.ll
|
|
|
|
fast-isel-branch-cond-split.ll
|
|
|
|
fast-isel-call-return.ll
|
|
|
|
fast-isel-cbz.ll
|
|
|
|
fast-isel-cmp-branch.ll
|
|
|
|
fast-isel-cmp-vec.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
fast-isel-cmpxchg.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
fast-isel-folded-shift.ll
|
|
|
|
fast-isel-folding.ll
|
|
|
|
fast-isel-gep.ll
|
|
|
|
fast-isel-int-ext2.ll
|
|
|
|
fast-isel-int-ext3.ll
|
|
|
|
fast-isel-int-ext4.ll
|
|
|
|
fast-isel-int-ext5.ll
|
|
|
|
fast-isel-int-ext.ll
|
|
|
|
fast-isel-intrinsic.ll
|
|
|
|
fast-isel-logic-op.ll
|
|
|
|
fast-isel-memcpy.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
fast-isel-mul.ll
|
|
|
|
fast-isel-runtime-libcall.ll
|
|
|
|
fast-isel-sdiv.ll
|
|
|
|
fast-isel-select.ll
|
|
|
|
fast-isel-shift.ll
|
|
|
|
fast-isel-sp-adjust.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
fast-isel-sqrt.ll
|
|
|
|
fast-isel-switch-phi.ll
|
|
|
|
fast-isel-tail-call.ll
|
|
|
|
fast-isel-tbz.ll
|
|
|
|
fast-isel-trunc.ll
|
|
|
|
fast-isel-vector-arithmetic.ll
|
|
|
|
fast-isel-vret.ll
|
|
|
|
fast-regalloc-empty-bb-with-liveins.mir
|
[RAFast] Don't dereference MBB::end
|
2018-01-29 23:42:37 +00:00 |
|
fastcc-reserved.ll
|
|
|
|
fastcc.ll
|
|
|
|
fcmp.ll
|
|
|
|
fcopysign.ll
|
|
|
|
fcsel-zero.ll
|
|
|
|
fcvt_combine.ll
|
|
|
|
fcvt-fixed.ll
|
|
|
|
fcvt-int.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
fdiv_combine.ll
|
|
|
|
fdiv-combine.ll
|
|
|
|
fence-singlethread.ll
|
|
|
|
flags-multiuse.ll
|
|
|
|
floatdp_1source.ll
|
|
|
|
floatdp_2source.ll
|
|
|
|
fold-constants.ll
|
|
|
|
fp16-v4-instructions.ll
|
[AArch64] optimise v4f16 fcmps to utilise vector instructions
|
2018-01-22 14:16:11 +00:00 |
|
fp16-v8-instructions.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
fp16-v16-instructions.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
fp16-vector-bitcast.ll
|
|
|
|
fp16-vector-load-store.ll
|
|
|
|
fp16-vector-nvcast.ll
|
|
|
|
fp16-vector-shuffle.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
fp128-folding.ll
|
|
|
|
fp-cond-sel.ll
|
AArch64: work around how Cyclone handles "movi.2d vD, #0".
|
2017-12-18 10:36:00 +00:00 |
|
fp-dp3.ll
|
|
|
|
fpconv-vector-op-scalarize.ll
|
|
|
|
fpimm.ll
|
|
|
|
fptouint-i8-zext.ll
|
|
|
|
frameaddr.ll
|
|
|
|
free-zext.ll
|
|
|
|
func-argpassing.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
func-calls.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
funcptr_cast.ll
|
|
|
|
function-subtarget-features.ll
|
|
|
|
gep-nullptr.ll
|
|
|
|
ghc-cc.ll
|
|
|
|
global-alignment.ll
|
|
|
|
global-merge-1.ll
|
|
|
|
global-merge-2.ll
|
|
|
|
global-merge-3.ll
|
|
|
|
global-merge-4.ll
|
|
|
|
global-merge-group-by-use.ll
|
|
|
|
global-merge-ignore-single-use-minsize.ll
|
|
|
|
global-merge-ignore-single-use.ll
|
|
|
|
global-merge.ll
|
|
|
|
got-abuse.ll
|
|
|
|
half.ll
|
|
|
|
hints.ll
|
|
|
|
i1-contents.ll
|
|
|
|
i128-align.ll
|
|
|
|
i128-fast-isel-fallback.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
ifcvt-select.ll
|
|
|
|
illegal-float-ops.ll
|
[Analysis] Disable exp/exp2/pow finite lib calls on Android with -ffast-math.
|
2018-01-23 11:11:36 +00:00 |
|
implicit-sret.ll
|
|
|
|
init-array.ll
|
|
|
|
inline-asm-constraints-badI.ll
|
|
|
|
inline-asm-constraints-badK2.ll
|
|
|
|
inline-asm-constraints-badK.ll
|
|
|
|
inline-asm-constraints-badL.ll
|
|
|
|
inline-asm-globaladdress.ll
|
|
|
|
inlineasm-ldr-pseudo.ll
|
|
|
|
inlineasm-X-allocation.ll
|
|
|
|
inlineasm-X-constraint.ll
|
|
|
|
intrinsics-memory-barrier.ll
|
|
|
|
jump-table.ll
|
|
|
|
large_shift.ll
|
|
|
|
large-consts.ll
|
|
|
|
ldp-stp-scaled-unscaled-pairs.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
ldst-opt-aa.mir
|
|
|
|
ldst-opt-zr-clobber.mir
|
|
|
|
ldst-opt.ll
|
|
|
|
ldst-opt.mir
|
[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.
|
2018-01-10 00:56:48 +00:00 |
|
ldst-paired-aliasing.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
ldst-regoffset.ll
|
|
|
|
ldst-unscaledimm.ll
|
|
|
|
ldst-unsignedimm.ll
|
|
|
|
ldst-zero.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
legalize-bug-bogus-cpu.ll
|
|
|
|
lit.local.cfg
|
|
|
|
literal_pools_float.ll
|
|
|
|
live-interval-analysis.mir
|
|
|
|
load-combine-big-endian.ll
|
|
|
|
load-combine.ll
|
|
|
|
local_vars.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
logical_shifted_reg.ll
|
|
|
|
logical-imm.ll
|
|
|
|
loh.mir
|
[CodeGen] Print global addresses as @foo in both MIR and debug output
|
2017-12-14 10:03:09 +00:00 |
|
loop-micro-op-buffer-size-t99.ll
|
[AArch64] Improve loop unrolling performance on Cavium T99
|
2017-12-09 23:59:55 +00:00 |
|
loopvectorize_pr33804_double.ll
|
|
|
|
lower-range-metadata-func-call.ll
|
|
|
|
machine_cse_impdef_killflags.ll
|
|
|
|
machine_cse.ll
|
|
|
|
machine-combiner-madd.ll
|
[AArch64] Update test cases for Exynos M3
|
2018-01-30 15:40:27 +00:00 |
|
machine-combiner.ll
|
|
|
|
machine-combiner.mir
|
|
|
|
machine-copy-prop.ll
|
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
|
2017-12-07 10:40:31 +00:00 |
|
machine-copy-remove.ll
|
|
|
|
machine-copy-remove.mir
|
|
|
|
machine-dead-copy.mir
|
|
|
|
machine-outliner-remarks.ll
|
[CodeGen] Always use printReg to print registers in both MIR and debug
|
2017-11-30 16:12:24 +00:00 |
|
machine-outliner.ll
|
|
|
|
machine-outliner.mir
|
[MachineOutliner] Move hasAddressTaken check to MachineOutliner.cpp
|
2018-01-13 00:42:28 +00:00 |
|
machine-scheduler.mir
|
|
|
|
machine-sink-kill-flags.ll
|
|
|
|
machine-sink-zr.mir
|
|
|
|
machine-zero-copy-remove.mir
|
|
|
|
macho-global-symbols.ll
|
|
|
|
madd-combiner.ll
|
|
|
|
madd-lohi.ll
|
|
|
|
mature-mc-support.ll
|
|
|
|
max-jump-table.ll
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
|
memcpy-f128.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
merge-store-dependency.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
merge-store.ll
|
AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag
|
2018-01-24 00:39:53 +00:00 |
|
mergestores_noimplicitfloat.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
min-jump-table.ll
|
[CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and debug output
|
2017-12-13 10:30:59 +00:00 |
|
minmax-of-minmax.ll
|
[ValueTracking] recognize min/max-of-min/max with notted ops (PR35875)
|
2018-01-11 15:13:47 +00:00 |
|
minmax.ll
|
|
|
|
misched-fusion-addr.ll
|
[AArch64] Add new target feature to fuse address generation with load or store
|
2018-01-30 16:28:01 +00:00 |
|
misched-fusion-aes.ll
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
|
misched-fusion-lit.ll
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
|
misched-fusion.ll
|
|
|
|
misched-stp.ll
|
AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag
|
2018-01-24 00:39:53 +00:00 |
|
movimm-wzr.mir
|
|
|
|
movw-consts.ll
|
|
|
|
movw-shift-encoding.ll
|
|
|
|
mul_pow2.ll
|
|
|
|
mul-lohi.ll
|
|
|
|
neg-imm.ll
|
|
|
|
neon-bitcast.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
neon-bitwise-instructions.ll
|
|
|
|
neon-compare-instructions.ll
|
|
|
|
neon-diagnostics.ll
|
|
|
|
neon-extract.ll
|
|
|
|
neon-fma-FMF.ll
|
|
|
|
neon-fma.ll
|
|
|
|
neon-fpround_f128.ll
|
|
|
|
neon-idiv.ll
|
|
|
|
neon-inline-asm-16-bit-fp.ll
|
|
|
|
neon-mla-mls.ll
|
|
|
|
neon-mov.ll
|
|
|
|
neon-or-combine.ll
|
|
|
|
neon-perm.ll
|
|
|
|
neon-scalar-by-elem-fma.ll
|
|
|
|
neon-scalar-copy.ll
|
|
|
|
neon-shift-left-long.ll
|
|
|
|
neon-truncStore-extLoad.ll
|
|
|
|
nest-register.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
no-fp-asm-clobbers-crash.ll
|
Don't crash when we see unallocatable registers in clobbers
|
2017-10-23 20:46:36 +00:00 |
|
no-quad-ldp-stp.ll
|
[AArch64] Update test cases for Exynos M3
|
2018-01-30 15:40:27 +00:00 |
|
nonlazybind.ll
|
|
|
|
nontemporal.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
nzcv-save.ll
|
|
|
|
optimize-cond-branch.ll
|
|
|
|
optimize-imm.ll
|
|
|
|
or-combine.ll
|
|
|
|
paired-load.ll
|
|
|
|
PBQP-chain.ll
|
|
|
|
PBQP-coalesce-benefit.ll
|
|
|
|
PBQP-csr.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
PBQP.ll
|
|
|
|
phi-dbg.ll
|
[CodeGen] Print register names in lowercase in both MIR and debug output
|
2017-11-28 17:15:09 +00:00 |
|
pic-eh-stubs.ll
|
|
|
|
pie.ll
|
|
|
|
postra-mi-sched.ll
|
|
|
|
pr27816.ll
|
|
|
|
pr33172.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
preferred-alignment.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
preferred-function-alignment.ll
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
|
prefixdata.ll
|
|
|
|
preserve_mostcc.ll
|
|
|
|
print-mrs-system-register.ll
|
|
|
|
prologue-epilogue-remarks.mir
|
|
|
|
ragreedy-csr.ll
|
|
|
|
rbit.ll
|
|
|
|
readcyclecounter.ll
|
|
|
|
recp-fastmath.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
redundant-copy-elim-empty-mbb.ll
|
|
|
|
Redundantstore.ll
|
|
|
|
reg-scavenge-frame.mir
|
|
|
|
regcoal-physreg.mir
|
MIR: Print the register class or bank in vreg defs
|
2017-10-24 18:04:54 +00:00 |
|
regress-bitcast-formals.ll
|
|
|
|
regress-f128csel-flags.ll
|
|
|
|
regress-fp128-livein.ll
|
|
|
|
regress-tail-livereg.ll
|
|
|
|
regress-tblgen-chains.ll
|
|
|
|
regress-w29-reserved-with-fp.ll
|
|
|
|
rem_crash.ll
|
|
|
|
remat-float0.ll
|
|
|
|
remat.ll
|
|
|
|
returnaddr.ll
|
|
|
|
rm_redundant_cmp.ll
|
|
|
|
rotate.ll
|
|
|
|
round-conv.ll
|
|
|
|
sched-past-vector-ldst.ll
|
|
|
|
scheduledag-constreg.mir
|
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
|
2017-12-07 10:40:31 +00:00 |
|
sdivpow2.ll
|
|
|
|
selectcc-to-shiftand.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
selectiondag-order.ll
|
|
|
|
setcc-takes-i32.ll
|
|
|
|
setcc-type-mismatch.ll
|
|
|
|
shrink-wrap.ll
|
|
|
|
sibling-call.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
simple-macho.ll
|
|
|
|
sincos-expansion.ll
|
|
|
|
sincospow-vector-expansion.ll
|
|
|
|
sitofp-fixed-legal.ll
|
|
|
|
special-reg.ll
|
|
|
|
spill-fold.ll
|
|
|
|
spill-fold.mir
|
Move tests to the correct place
|
2018-01-19 06:08:15 +00:00 |
|
spill-undef.mir
|
[MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.
|
2018-01-10 00:56:48 +00:00 |
|
sqrt-fastmath.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
stack_guard_remat.ll
|
|
|
|
stack-guard-remat-bitcast.ll
|
|
|
|
stack-protector-target.ll
|
|
|
|
stackmap-frame-setup.ll
|
|
|
|
stackmap-liveness.ll
|
|
|
|
store_merge_pair_offset.ll
|
|
|
|
strqro.ll
|
|
|
|
subs-to-sub-opt.ll
|
|
|
|
swift-error.ll
|
|
|
|
swift-return.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
swiftcc.ll
|
|
|
|
swifterror.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
swiftself-scavenger.ll
|
|
|
|
swiftself.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
tail-call.ll
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
tailcall_misched_graph.ll
|
[CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and debug output
|
2017-12-15 16:33:45 +00:00 |
|
tailcall-ccmismatch.ll
|
|
|
|
tailcall-explicit-sret.ll
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
|
tailcall-fastisel.ll
|
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
|
2018-01-02 16:30:47 +00:00 |
|
tailcall-implicit-sret.ll
|
[ARM][AArch64][DAG] Reenable post-legalize store merge
|
2017-12-06 15:30:13 +00:00 |
|
tailcall-mem-intrinsics.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
tailcall-string-rvo.ll
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
|
tailmerging_in_mbp.ll
|
|
|
|
tbi.ll
|
|
|
|
tbz-tbnz.ll
|
|
|
|
trunc-v1i64.ll
|
|
|
|
tst-br.ll
|
|
|
|
vcvt-oversize.ll
|
|
|
|
vector_merge_dep_check.ll
|
|
|
|
vector-fcopysign.ll
|
[AArch64][TableGen] Skip tied result operands for InstAlias
|
2017-11-20 14:36:40 +00:00 |
|
win64_vararg.ll
|
|
|
|
xbfiz.ll
|
|
|
|
xray-attribute-instrumentation.ll
|
|
|
|
xray-tail-call-sled.ll
|
|
|
|
zero-reg.ll
|
|
|
