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1bb3751439
This does not schedule any passes besides the ones necessary to construct and print the machine function. This is useful to test .mir file reading and printing. Differential Revision: http://reviews.llvm.org/D22432 llvm-svn: 275664
35 lines
831 B
YAML
35 lines
831 B
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses simple register allocation hints
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# correctly.
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--- |
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define i32 @test(i32 %a, i32 %b) {
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body:
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%c = mul i32 %a, %b
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ret i32 %c
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}
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...
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---
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name: test
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tracksRegLiveness: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gr32 }
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# CHECK-NEXT: - { id: 1, class: gr32, preferred-register: '%esi' }
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# CHECK-NEXT: - { id: 2, class: gr32, preferred-register: '%edi' }
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registers:
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- { id: 0, class: gr32 }
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- { id: 1, class: gr32, preferred-register: '%esi' }
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- { id: 2, class: gr32, preferred-register: '%edi' }
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body: |
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bb.0.body:
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liveins: %edi, %esi
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%1 = COPY %esi
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%2 = COPY %edi
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%2 = IMUL32rr %2, %1, implicit-def dead %eflags
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%eax = COPY %2
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RETQ killed %eax
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...
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