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https://github.com/RPCS3/llvm-mirror.git
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ed12a24627
Try to match scalar and first like the other instructions. Expand 64-bit ands to a pair of 32-bit ands since that is not available on the VALU. llvm-svn: 204660
90 lines
3.2 KiB
LLVM
90 lines
3.2 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
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;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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; EG-CHECK-LABEL: @or_v2i32
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;SI-CHECK-LABEL: @or_v2i32
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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define void @or_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
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%a = load <2 x i32> addrspace(1) * %in
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%b = load <2 x i32> addrspace(1) * %b_ptr
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%result = or <2 x i32> %a, %b
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store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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ret void
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}
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; EG-CHECK-LABEL: @or_v4i32
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG-CHECK: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;SI-CHECK-LABEL: @or_v4i32
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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;SI-CHECK: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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define void @or_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32> addrspace(1) * %in
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%b = load <4 x i32> addrspace(1) * %b_ptr
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%result = or <4 x i32> %a, %b
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store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: @scalar_or_i32
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; SI-CHECK: S_OR_B32
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define void @scalar_or_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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%or = or i32 %a, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: @vector_or_i32
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}
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define void @vector_or_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %a, i32 %b) {
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%loada = load i32 addrspace(1)* %a
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%or = or i32 %loada, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; EG-CHECK-LABEL: @scalar_or_i64
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; EG-CHECK-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y
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; EG-CHECK-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[3].X, KC0[3].Z
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; SI-CHECK-LABEL: @scalar_or_i64
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; SI-CHECK: S_OR_B64
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define void @scalar_or_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
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%or = or i64 %a, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: @vector_or_i64
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}
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define void @vector_or_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
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%loada = load i64 addrspace(1)* %a, align 8
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%loadb = load i64 addrspace(1)* %a, align 8
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%or = or i64 %loada, %loadb
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; SI-CHECK-LABEL: @scalar_vector_or_i64
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}
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define void @scalar_vector_or_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 %b) {
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%loada = load i64 addrspace(1)* %a
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%or = or i64 %loada, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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