mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
41 lines
999 B
LLVM
41 lines
999 B
LLVM
; RUN: llc -march=arm64 < %s | FileCheck %s
|
|
|
|
@var32 = global i32 0
|
|
|
|
define void @test_zextloadi1_unscaled(i1* %base) {
|
|
; CHECK-LABEL: test_zextloadi1_unscaled:
|
|
; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
|
|
|
|
%addr = getelementptr i1* %base, i32 -7
|
|
%val = load i1* %addr, align 1
|
|
|
|
%extended = zext i1 %val to i32
|
|
store i32 %extended, i32* @var32, align 4
|
|
ret void
|
|
}
|
|
|
|
define void @test_zextloadi8_unscaled(i8* %base) {
|
|
; CHECK-LABEL: test_zextloadi8_unscaled:
|
|
; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
|
|
|
|
%addr = getelementptr i8* %base, i32 -7
|
|
%val = load i8* %addr, align 1
|
|
|
|
%extended = zext i8 %val to i32
|
|
store i32 %extended, i32* @var32, align 4
|
|
ret void
|
|
}
|
|
|
|
define void @test_zextloadi16_unscaled(i16* %base) {
|
|
; CHECK-LABEL: test_zextloadi16_unscaled:
|
|
; CHECK: ldurh {{w[0-9]+}}, [{{x[0-9]+}}, #-14]
|
|
|
|
%addr = getelementptr i16* %base, i32 -7
|
|
%val = load i16* %addr, align 2
|
|
|
|
%extended = zext i16 %val to i32
|
|
store i32 %extended, i32* @var32, align 4
|
|
ret void
|
|
}
|
|
|