mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-31 07:52:55 +01:00
2ca847f56b
Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some only support Thumb mode (M-class ones currently). This makes sure such CPUs default to the correct mode and makes the AsmParser diagnose an attempt to switch modes incorrectly. rdar://14024354 llvm-svn: 183710
25 lines
593 B
ArmAsm
25 lines
593 B
ArmAsm
@@ test st_value bit 0 of thumb function
|
|
@ RUN: llvm-mc %s -triple=armv4t-freebsd-eabi -filetype=obj -o - | \
|
|
@ RUN: llvm-readobj -r | FileCheck %s
|
|
|
|
|
|
.syntax unified
|
|
.text
|
|
.globl f
|
|
.align 2
|
|
.type f,%function
|
|
.code 16
|
|
.thumb_func
|
|
f:
|
|
push {r7, lr}
|
|
mov r7, sp
|
|
bl g
|
|
pop {r7, pc}
|
|
|
|
@@ make sure an R_ARM_THM_CALL relocation is generated for the call to g
|
|
@CHECK: Relocations [
|
|
@CHECK-NEXT: Section (2) .rel.text {
|
|
@CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0
|
|
@CHECK-NEXT: }
|
|
@CHECK-NEXT: ]
|