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019ae7d515
That's only a required extension as of v8.1a. Remove it from the "generic" CPU as well: it should only support the base ISA (and binutils agrees). Also unify the MC tests into crc.s and arm64-crc32.s llvm-svn: 302077
46 lines
1.3 KiB
ArmAsm
46 lines
1.3 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-- -mattr=+crc %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=CRC
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// RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=NOCRC
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// RUN: not llvm-mc -triple aarch64-- -mcpu=cyclone %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=NOCRC
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crc32b w0, w1, w5
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crc32h w3, w5, w6
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crc32w w19, wzr, w20
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crc32x w3, w5, x20
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// CRC: crc32b w0, w1, w5
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// CRC: crc32h w3, w5, w6
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// CRC: crc32w w19, wzr, w20
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// CRC: crc32x w3, w5, x20
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32b w0, w1, w5
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32h w3, w5, w6
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32w w19, wzr, w20
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32x w3, w5, x20
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crc32cb w5, w10, w15
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crc32ch w3, w5, w7
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crc32cw w11, w13, w17
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crc32cx w19, w23, x29
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// CRC: crc32cb w5, w10, w15
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// CRC: crc32ch w3, w5, w7
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// CRC: crc32cw w11, w13, w17
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// CRC: crc32cx w19, w23, x29
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32cb w5, w10, w15
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32ch w3, w5, w7
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32cw w11, w13, w17
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// NOCRC: error: instruction requires: crc
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// NOCRC: crc32cx w19, w23, x29
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