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5d88cb6cf6
ARM seems to prefer that long literals be formed from their little end in order to promote the fusion of the instrs pairs MOV/MOVK and MOVK/MOVK on Cortex A57 and others (v. "Cortex A57 Software Optimisation Guide", section 4.14). Differential revision: https://reviews.llvm.org/D28697 llvm-svn: 292422
62 lines
1.7 KiB
LLVM
62 lines
1.7 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -code-model=large -o - %s | FileCheck %s
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@var8 = global i8 0
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@var16 = global i16 0
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@var32 = global i32 0
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@var64 = global i64 0
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define i8* @global_addr() {
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; CHECK-LABEL: global_addr:
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ret i8* @var8
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; The movz/movk calculation should end up returned directly in x0.
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; CHECK: movz x0, #:abs_g0_nc:var8
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; CHECK: movk x0, #:abs_g1_nc:var8
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; CHECK: movk x0, #:abs_g2_nc:var8
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; CHECK: movk x0, #:abs_g3:var8
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; CHECK-NEXT: ret
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}
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define i8 @global_i8() {
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; CHECK-LABEL: global_i8:
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%val = load i8, i8* @var8
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ret i8 %val
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; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var8
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; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var8
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; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8
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; CHECK: movk x[[ADDR_REG]], #:abs_g3:var8
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; CHECK: ldrb w0, [x[[ADDR_REG]]]
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}
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define i16 @global_i16() {
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; CHECK-LABEL: global_i16:
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%val = load i16, i16* @var16
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ret i16 %val
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; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var16
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; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16
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; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
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; CHECK: movk x[[ADDR_REG]], #:abs_g3:var16
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; CHECK: ldrh w0, [x[[ADDR_REG]]]
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}
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define i32 @global_i32() {
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; CHECK-LABEL: global_i32:
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%val = load i32, i32* @var32
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ret i32 %val
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; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var32
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; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var32
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; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32
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; CHECK: movk x[[ADDR_REG]], #:abs_g3:var32
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; CHECK: ldr w0, [x[[ADDR_REG]]]
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}
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define i64 @global_i64() {
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; CHECK-LABEL: global_i64:
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%val = load i64, i64* @var64
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ret i64 %val
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; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var64
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; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var64
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; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64
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; CHECK: movk x[[ADDR_REG]], #:abs_g3:var64
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; CHECK: ldr x0, [x[[ADDR_REG]]]
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}
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