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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen
Matt Arsenault ef34769c29 R600: Make cttz / ctlz cheap to speculate
Speculating things is generally good. SI+ has instructions for these
for 32-bit values. This is still probably better even with the expansion
for 64-bit values, although it is odd that this callback doesn't have
the size as a parameter.

llvm-svn: 225822
2015-01-13 19:46:48 +00:00
..
AArch64 Fix PR22179. 2015-01-10 23:41:24 +00:00
ARM Debug info: Factor out the creation of DWARF expressions from AsmPrinter 2015-01-12 22:19:22 +00:00
CPP
Generic CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. 2014-12-19 20:50:07 +00:00
Hexagon [Hexagon] Adding dealloc_return encoding and absolute address stores. 2015-01-06 16:15:15 +00:00
Inputs IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Mips [mips][microMIPS] Fix issue with 16b instructions in jr instruction delay slot 2015-01-13 15:59:17 +00:00
MSP430
NVPTX [NVPTX] Fix bugs related to isSingleValueType 2014-12-17 17:59:04 +00:00
PowerPC Use the integrated assembler as default on PowerPC 2015-01-13 19:43:45 +00:00
R600 R600: Make cttz / ctlz cheap to speculate 2015-01-13 19:46:48 +00:00
SPARC IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
SystemZ Use the integrated assembler as default on SystemZ 2015-01-13 19:45:16 +00:00
Thumb IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Thumb2 [ARM] Fix a bug in constant island pass that was triggering an assertion. 2015-01-08 20:44:50 +00:00
X86 Rename llvm.recoverframeallocation to llvm.framerecover 2015-01-13 01:51:34 +00:00
XCore IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00