Sagar Thakur 5eb36c5e30 [MIPS][LLVM-MC] Fix Disassemble of Negative Offset ... Patch by Nitesh Jain. Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added. Reviewers: dsanders, vkalintiris Differential Revision: http://reviews.llvm.org/D17540 llvm-svn: 270542		2016-05-24 09:57:10 +00:00
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Interpreter
MCJIT	[powerpc] mark JIT tests as UNSUPPORTED on powerpc64 big endian	2016-04-26 03:59:19 +00:00
OrcLazy	Disable the new Orc lazy JIT tests on Windows, they do not pass	2016-02-10 18:46:42 +00:00
OrcMCJIT	[powerpc] mark JIT tests as UNSUPPORTED on powerpc64 big endian	2016-04-26 03:59:19 +00:00
RuntimeDyld	[MIPS][LLVM-MC] Fix Disassemble of Negative Offset	2016-05-24 09:57:10 +00:00
2010-01-15-UndefValue.ll
fma3-jit.ll
frem.ll
lit.local.cfg	[SPARC] Disable unsupported ExecutionEngine tests, and XFAIL a couple	2015-08-07 23:01:16 +00:00
mov64zext32.ll
test-interp-vec-arithm_float.ll
test-interp-vec-arithm_int.ll
test-interp-vec-cast.ll
test-interp-vec-insertelement.ll
test-interp-vec-insertextractvalue.ll
test-interp-vec-loadstore.ll
test-interp-vec-logical.ll
test-interp-vec-select.ll
test-interp-vec-setcond-fp.ll
test-interp-vec-setcond-int.ll
test-interp-vec-shift.ll
test-interp-vec-shuffle.ll