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In the assembler, we should emit build attributes based on the target selected with command-line options. This matches the GNU assembler's behaviour. We only do this for build attributes which describe the hardware that is expected to be available, not the ones that describe ABI compatibility. This is done by moving some of the attribute emission code to ARMTargetStreamer, so that it can be shared between the assembly and code-generation code paths. Since the assembler only creates a MCSubtargetInfo, not an ARMSubtarget, the code had to be changed to check raw features, and not use the convenience functions in ARMSubtarget. If different attributes are later specified using the .eabi_attribute directive, then they will take precedence, as happens when the same .eabi_attribute is specified twice. This must be enabled by an option, because we don't want to do this when parsing inline assembly. The attributes would match the ones emitted at the start of the file, so wouldn't actually change the emitted object file, but the extra directives would be added to every inline assembly block when emitting assembly, which we'd like to avoid. The majority of the changes in the build-attributes.ll test are just re-ordering the directives, because the hardware attributes are now emitted before the ABI ones. However, I did fix one bug which I spotted: Tag_CPU_arch_profile was not being emitted for v6M. Differential revision: https://reviews.llvm.org/D31812 llvm-svn: 300547
44 lines
2.1 KiB
ArmAsm
44 lines
2.1 KiB
ArmAsm
// RUN: llvm-mc -triple armv7a < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7A
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// RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v6M
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// RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s --check-prefix=v7M
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// RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes | FileCheck %s --check-prefix=Cortex-A15
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// This isn't intended to be a through check of the build attributes emitted
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// for each target (that's tested elsewhere), but just to check that the
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// hardware attributes are emitted by the assembler based on the selected
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// target when requested.
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// v7A-NOT: .cpu
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// v7A: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// v7A: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
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// v7A: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use
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// v7A: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// v7A: .fpu neon
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// v7A: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// v6M-NOT: .cpu
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// v6M: .eabi_attribute 6, 12 @ Tag_CPU_arch
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// v6M: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v6M: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v6M: .eabi_attribute 9, 1 @ Tag_THUMB_ISA_use
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// v6M: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// v7M-NOT: .cpu
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// v7M: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// v7M: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile
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// v7M: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use
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// v7M: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// v7M: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// Cortex-A15: .cpu cortex-a15
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// Cortex-A15: .eabi_attribute 6, 10 @ Tag_CPU_arch
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// Cortex-A15: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile
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// Cortex-A15: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use
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// Cortex-A15: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use
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// Cortex-A15: .fpu neon-vfpv4
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// Cortex-A15: .eabi_attribute 36, 1 @ Tag_FP_HP_extension
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// Cortex-A15: .eabi_attribute 42, 1 @ Tag_MPextension_use
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// Cortex-A15: .eabi_attribute 44, 2 @ Tag_DIV_use
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// Cortex-A15: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access
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// Cortex-A15: .eabi_attribute 68, 3 @ Tag_Virtualization_use
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