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3d936b9a18
This adds diagnostic strings for the ARM general-purpose register classes, which will be used when these classes are expected by the assembler, but the provided operand is not valid. One of these, rGPR, requires C++ code to select the correct error message, as that class contains different registers in pre-v8 and v8 targets. The rest can all have their diagnostic strings stored in the tablegen description of them. Differential revision: https://reviews.llvm.org/D36692 llvm-svn: 315303
30 lines
1.2 KiB
ArmAsm
30 lines
1.2 KiB
ArmAsm
# RUN: not llvm-mc -triple armv7 %s 2>&1| FileCheck %s
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.arm
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ADC r0, r1, #0xFFFFFEEE
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# CHECK: error: invalid instruction, any one of the following would fix this:
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# CHECK: note: invalid operand for instruction
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# CHECK: note: operand must be a register in range [r0, r15]
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ADC r0, r1, #0xABFEABFF
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# CHECK: error: invalid instruction, any one of the following would fix this:
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# CHECK: note: invalid operand for instruction
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# CHECK: note: operand must be a register in range [r0, r15]
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ADC r0, r1, #0xFFFFFE02
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# CHECK: error: invalid instruction, any one of the following would fix this:
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# CHECK: note: invalid operand for instruction
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# CHECK: note: operand must be a register in range [r0, r15]
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ADD.W r0, r0, #0xFF01FF01
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# CHECK: error: invalid instruction, any one of the following would fix this:
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# CHECK: note: invalid operand for instruction
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# CHECK: note: operand must be a register in range [r0, r15]
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ORR r0, r1, #0xFFFFFF00
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# CHECK: error: invalid instruction, any one of the following would fix this:
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# CHECK: note: invalid operand for instruction
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# CHECK: note: operand must be a register in range [r0, r15]
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# CHECK: note: instruction requires: thumb2
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ORN r0, r1, #0xFFFFFF00
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# CHECK: error: instruction requires: thumb2
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