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llvm-mirror/test/MC/Disassembler
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Simon Dardis 59a7022fac [mips] Correct the predicates of arithmetic and logic instructions. 
As part of this effort, duplicate and correct the predicates of some
aliases. Also disable code generation of some short form instructions
for FastISel, as it would otherwise reject them.

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D47075

llvm-svn: 333530
2018-05-30 11:33:35 +00:00
..
AArch64 [AArch64] Fix spelling of ICH_ELRSR_EL2 system register 2018-02-06 09:39:04 +00:00
AMDGPU AMDGPU: Fix v_dot{4, 8}* instruction encoding 2018-05-15 19:32:47 +00:00
ARC [ARC] Add LImm support for J/JL 2018-04-13 15:10:34 +00:00
ARM [ARM]Decoding MSR with unpredictable destination register causes an assert 2018-03-06 15:21:19 +00:00
Hexagon [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
Lanai
Mips [mips] Correct the predicates of arithmetic and logic instructions. 2018-05-30 11:33:35 +00:00
PowerPC [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. 2018-02-23 15:55:16 +00:00
Sparc
SystemZ [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
WebAssembly [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
X86 [x86] Introduce the enclv instruction 2018-05-08 07:11:05 +00:00
XCore