Jay Foad f21bfff407 [AMDGPU] Use reductions instead of scans in the atomic optimizer ... If the result of an atomic operation is not used then it can be more efficient to build a reduction across all lanes instead of a scan. Do this for GFX10, where the permlanex16 instruction makes it viable. For wave64 this saves a couple of dpp operations. For wave32 it saves one readlane (which are generally bad for performance) and one dpp operation. Differential Revision: https://reviews.llvm.org/D98953		2021-03-26 15:38:14 +00:00
..
Analysis	[BasicAA] Add a few cases with overflows in index computations.	2021-03-26 14:50:03 +00:00
Assembler
Bindings	[OCaml] Add (get/set)_module_identifer functions	2021-03-20 20:41:51 +05:30
Bitcode	[IR] Add vscale_range IR function attribute	2021-03-22 12:05:06 +00:00
BugPoint
CodeGen	[AMDGPU] Use reductions instead of scans in the atomic optimizer	2021-03-26 15:38:14 +00:00
DebugInfo	[XCore][Test] XFAIL tests requiring 8-byte stack alignment.	2021-03-24 09:12:53 +00:00
Demangle
Examples
ExecutionEngine	[JITLink][MachO] Use full <segment>,<section> names for MachO jitlink::Sections.	2021-03-25 18:31:18 -07:00
Feature
FileCheck	[FileCheck] Fix PR49531: invalid use of string var	2021-03-24 18:49:58 +00:00
Instrumentation	[llvm][hwasan] Add Fuchsia shadow mapping configuration	2021-03-25 15:28:59 -07:00
Integer	Temporarily revert "[lli] Make -jit-kind=orc the default JIT engine"	2021-03-23 12:01:30 +01:00
JitListener
Linker	Support intrinsic overloading on unnamed types	2021-03-19 14:34:25 +01:00
LTO	[LTO][MC] Discard non-prevailing defined symbols in module-level assembly	2021-03-18 15:33:42 -07:00
MachineVerifier	[GlobalISel] Add G_ROTR and G_ROTL opcodes for rotates.	2021-03-25 17:23:30 -07:00
MC	[AArch64] Support .arch_extension pan	2021-03-24 11:29:22 -07:00
Object	AMDGPU: Add target id and code object v4 support	2021-03-24 11:54:05 -04:00
ObjectYAML	[WebAssembly] Rename WasmLimits::Initial to ::Minimum. NFC.	2021-03-24 09:10:11 +01:00
Other	add print-change diff modes that do not use colour	2021-03-25 10:35:27 -04:00
Reduce
SafepointIRVerifier
Support
SymbolRewriter
TableGen	[openacc][openmp] Reduce number of generated file and prefer inclusion of .inc	2021-03-23 09:16:53 -04:00
ThinLTO/X86
tools	[MCA] Support carry-over instructions for in-order processors	2021-03-26 00:06:19 +03:00
Transforms	[SLP] move test for min/max crashing; NFC	2021-03-26 10:28:15 -04:00
Unit	[lit] Sort test start times based on prior test timing data	2021-03-16 05:23:04 -04:00
Verifier	[IR][SVE] Add new llvm.experimental.stepvector intrinsic	2021-03-23 10:43:35 +00:00
YAMLParser
.clang-format
CMakeLists.txt	Revert "[IRSim] Adding basic implementation of llvm-sim."	2021-03-20 18:03:09 -05:00
lit.cfg.py	Revert "[IRSim] Adding basic implementation of llvm-sim."	2021-03-20 18:03:09 -05:00
lit.site.cfg.py.in	[test] Add ability to get error messages from CMake for errc substitution	2021-03-15 20:56:08 +01:00
TestRunner.sh