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ad7f73b5d3
Summary: Now we generate PAL metadata for the amdpal os type, there is no need to generate the .AMDGPU.config section. Reviewers: arsenm, nhaehnle, dstuttard Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D37760 Change-Id: I303c5fad66656ce97293da60621afac6595b4c18 llvm-svn: 324346
59 lines
2.2 KiB
LLVM
59 lines
2.2 KiB
LLVM
; RUN: llc < %s -mtriple=amdgcn--amdpal -mcpu=tahiti | FileCheck --check-prefix=PAL --enable-var-scope %s
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; PAL-NOT: .AMDGPU.config
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; PAL-LABEL: {{^}}simple:
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define amdgpu_kernel void @simple(i32 addrspace(1)* %out) {
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entry:
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store i32 0, i32 addrspace(1)* %out
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ret void
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}
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; Check code sequence for amdpal use of scratch for alloca. This is the case
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; where the high half of the address comes from s_getpc.
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; PAL-LABEL: {{^}}scratch:
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; PAL: s_getpc_b64 s{{\[}}[[GITPTR:[0-9]+]]:
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; PAL: s_mov_b32 s[[GITPTR]], s0
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; PAL: s_load_dwordx4 s{{\[}}[[SCRATCHDESC:[0-9]+]]:{{[0-9]+]}}, s{{\[}}[[GITPTR]]:
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; PAL: buffer_store{{.*}}, s{{\[}}[[SCRATCHDESC]]:
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define amdgpu_kernel void @scratch(<2 x i32> %in, i32 %idx, i32 addrspace(5)* %out) {
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entry:
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%v = alloca [2 x i32], addrspace(5)
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%vv = bitcast [2 x i32] addrspace(5)* %v to <2 x i32> addrspace(5)*
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store <2 x i32> %in, <2 x i32> addrspace(5)* %vv
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%e = getelementptr [2 x i32], [2 x i32] addrspace(5)* %v, i32 0, i32 %idx
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%x = load i32, i32 addrspace(5)* %e
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store i32 %x, i32 addrspace(5)* %out
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ret void
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}
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; Check code sequence for amdpal use of scratch for alloca. This is the case
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; where the amdgpu-git-ptr-high function attribute gives the high half of the
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; address to use.
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; Looks like you can't do arithmetic on a filecheck variable, so we can't test
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; that the s_movk_i32 is into a reg that is one more than the following
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; s_mov_b32.
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; PAL-LABEL: {{^}}scratch2:
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; PAL: s_movk_i32 s{{[0-9]+}}, 0x1234
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; PAL: s_mov_b32 s[[GITPTR:[0-9]+]], s0
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; PAL: s_load_dwordx4 s{{\[}}[[SCRATCHDESC:[0-9]+]]:{{[0-9]+]}}, s{{\[}}[[GITPTR]]:
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; PAL: buffer_store{{.*}}, s{{\[}}[[SCRATCHDESC]]:
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define amdgpu_kernel void @scratch2(<2 x i32> %in, i32 %idx, i32 addrspace(5)* %out) #0 {
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entry:
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%v = alloca [2 x i32], addrspace(5)
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%vv = bitcast [2 x i32] addrspace(5)* %v to <2 x i32> addrspace(5)*
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store <2 x i32> %in, <2 x i32> addrspace(5)* %vv
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%e = getelementptr [2 x i32], [2 x i32] addrspace(5)* %v, i32 0, i32 %idx
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%x = load i32, i32 addrspace(5)* %e
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store i32 %x, i32 addrspace(5)* %out
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ret void
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}
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attributes #0 = { nounwind "amdgpu-git-ptr-high"="0x1234" }
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; Check we have CS_NUM_USED_VGPRS in PAL metadata.
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; PAL: .amd_amdgpu_pal_metadata {{.*}},0x10000027,
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