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5383871f8b
Summary: AMDGPU has two register classes with the same set of registers, and this was causing this tablegen backend would get stuck in infinite recursion. Reviewers: dsanders Reviewed By: dsanders Subscribers: tpr, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D29049 llvm-svn: 293483
16 lines
465 B
TableGen
16 lines
465 B
TableGen
// RUN: llvm-tblgen -gen-register-bank -I %p/../../include %s | FileCheck %s
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def R0 : Register<"r0">;
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let Size = 32 in {
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def ClassA : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
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def ClassB : RegisterClass<"MyTarget", [i1], 32, (add ClassA)>;
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}
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// CHECK: GPRRegBankCoverageData
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// CHECK: MyTarget::ClassARegClassID
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// CHECK: MyTarget::ClassBRegClassID
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def GPRRegBank : RegisterBank<"GPR", [ClassA]>;
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