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llvm-mirror/test/CodeGen/ARM64/zext.ll
Tim Northover 2f13163a84 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00

12 lines
238 B
LLVM

; RUN: llc < %s -march=arm64 | FileCheck %s
define i64 @foo(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK-LABEL: foo:
; CHECK: add w0, w1, w0
; CHECK: ret
%add = add i32 %b, %a
%conv = zext i32 %add to i64
ret i64 %conv
}