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f2f1248de9
llvm-mirror/lib/Target/AArch64
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Sanjin Sijaric f2f1248de9 [AArch64] Transfer memory operands when lowering vector load/store intrinsics 
Summary:
Some vector loads and stores generated from AArch64 intrinsics alias each other
unnecessarily, preventing better scheduling.  We just need to transfer memory
operands during lowering.

Reviewers: mcrosier, t.p.northover, jmolloy

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D26313

llvm-svn: 286168
2016-11-07 22:39:02 +00:00
..
AsmParser [TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.h 2016-11-01 16:32:05 +00:00
Disassembler Support: Remove MemoryObject and DataStreamer interfaces. 2016-11-02 00:08:37 +00:00
InstPrinter AArch64: TableGenerate system instruction operands. 2016-07-05 21:23:04 +00:00
MCTargetDesc AArch64 ILP32 relocations for assembly and ELF 2016-10-24 13:37:13 +00:00
TargetInfo Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
Utils AArch64: try to fix optimized build failure. 2016-07-05 23:15:58 +00:00
AArch64.h [AArch64] Avoid generating indexed vector instructions for Exynos 2016-10-08 12:30:07 +00:00
AArch64.td [AArch64] Removed the narrow load merging code in the ld/st optimizer. 2016-11-07 15:27:22 +00:00
AArch64A53Fix835769.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64A57FPLoadBalancing.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64AddressTypePromotion.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64AdvSIMDScalarPass.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64AsmPrinter.cpp Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
AArch64CallingConvention.h Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td GlobalISel: produce correct code for signext/zeroext ABI flags. 2016-09-21 12:57:45 +00:00
AArch64CallLowering.cpp GlobalISel: handle stack-based parameters on AArch64. 2016-09-22 13:49:25 +00:00
AArch64CallLowering.h GlobalISel: handle stack-based parameters on AArch64. 2016-09-22 13:49:25 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64CollectLOH.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64ConditionalCompares.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64ConditionOptimizer.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64DeadRegisterDefinitionsPass.cpp AArch64DeadRegisterDefinitionsPass: Cleanup; NFC 2016-10-29 01:03:41 +00:00
AArch64ExpandPseudoInsts.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64FastISel.cpp Swift Calling Convetion: add support for AArch64. 2016-08-26 19:28:17 +00:00
AArch64FrameLowering.cpp Move helpers into anonymous namespaces. NFC. 2016-08-06 11:13:10 +00:00
AArch64FrameLowering.h [PEI, AArch64] Use empty spaces in stack area for local stack slot allocation. 2016-06-02 16:22:07 +00:00
AArch64GenRegisterBankInfo.def [AArch64][RegisterBankInfo] Describe cross regbank copies statically. 2016-10-13 00:12:06 +00:00
AArch64InstrAtomics.td AArch64: properly calculate cmpxchg status in FastISel. 2016-08-02 20:22:36 +00:00
AArch64InstrFormats.td [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround 2016-08-18 20:08:15 +00:00
AArch64InstrInfo.cpp Test commit 2016-10-21 15:24:08 +00:00
AArch64InstrInfo.h AArch64: Move remaining target specific BranchRelaxation bits to TII 2016-10-06 15:38:09 +00:00
AArch64InstrInfo.td [AArch64] Optionally use the Newton series for reciprocal estimation 2016-10-24 16:14:58 +00:00
AArch64InstructionSelector.cpp GlobalISel: allow truncating pointer casts on AArch64. 2016-10-31 18:31:09 +00:00
AArch64InstructionSelector.h GlobalISel: select G_GLOBAL_VALUE uses on AArch64. 2016-10-10 21:50:00 +00:00
AArch64ISelDAGToDAG.cpp [AArch64] Transfer memory operands when lowering vector load/store intrinsics 2016-11-07 22:39:02 +00:00
AArch64ISelLowering.cpp This patch adds support for 16 bit floating point registers to the inline asm register selection on AArch64. 2016-11-07 15:42:12 +00:00
AArch64ISelLowering.h [AArch64] Optionally use the Newton series for reciprocal estimation 2016-10-24 16:14:58 +00:00
AArch64LegalizerInfo.cpp GlobalISel: allow truncating pointer casts on AArch64. 2016-10-31 18:31:09 +00:00
AArch64LegalizerInfo.h GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Remove dead store. Found by gcc7. 2016-11-07 19:11:25 +00:00
AArch64MachineFunctionInfo.h [AArch64] Mark various *Info classes as 'final'. NFC. 2016-07-27 14:31:46 +00:00
AArch64MCInstLower.cpp Remove TargetTriple from AArch64MCInstLower as it's used in few places 2016-10-01 01:50:25 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.cpp CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 2016-02-27 06:40:41 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64RedundantCopyElimination.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64RegisterBankInfo.cpp [AArch64][RegisterBankInfo] Switch to fully static opds mapping for G_BITCAST. 2016-10-13 18:46:38 +00:00
AArch64RegisterBankInfo.h [AArch64][RegisterBankInfo] Add getSameKindofOperandsMapping. 2016-10-03 20:20:13 +00:00
AArch64RegisterInfo.cpp [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg(). 2016-09-27 22:17:27 +00:00
AArch64RegisterInfo.h Target: Remove unused entities. 2016-10-09 04:38:57 +00:00
AArch64RegisterInfo.td [AArch64] Corrected spill size for DDD register class. NFCI 2016-10-21 09:53:42 +00:00
AArch64SchedA53.td Remove MinLatency in SchedMachineModel. NFC. 2016-04-26 00:37:46 +00:00
AArch64SchedA57.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
AArch64SchedKryo.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedKryoDetails.td [AArch64] Add support for Qualcomm Kryo CPU. 2016-02-12 15:51:51 +00:00
AArch64SchedM1.td [AArch64] Adjust the scheduling model for Exynos M1. 2016-09-06 19:22:29 +00:00
AArch64Schedule.td CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
AArch64SchedVulcan.td [AArch64] Add Broadcom Vulcan scheduling model. 2016-06-30 06:42:31 +00:00
AArch64SelectionDAGInfo.cpp [SDAG] Remove FixedArgs parameter from CallLoweringInfo::setCallee 2016-06-22 12:54:25 +00:00
AArch64SelectionDAGInfo.h Pass DebugLoc and SDLoc by const ref. 2016-06-12 15:39:02 +00:00
AArch64StorePairSuppress.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AArch64Subtarget.cpp [AArch64] Adjust the cost model for Exynos M1. 2016-10-25 20:05:42 +00:00
AArch64Subtarget.h [AArch64] Removed the narrow load merging code in the ld/st optimizer. 2016-11-07 15:27:22 +00:00
AArch64SystemOperands.td AArch64: TableGenerate system instruction operands. 2016-07-05 21:23:04 +00:00
AArch64TargetMachine.cpp AArch64 ILP32 relocations for assembly and ELF 2016-10-24 13:37:13 +00:00
AArch64TargetMachine.h Revert "[AArch64] Use the reciprocal estimation machinery" 2016-09-20 19:02:06 +00:00
AArch64TargetObjectFile.cpp Move the Mangler from the AsmPrinter down to TLOF and clean up the 2016-09-16 07:33:15 +00:00
AArch64TargetObjectFile.h Move the Mangler from the AsmPrinter down to TLOF and clean up the 2016-09-16 07:33:15 +00:00
AArch64TargetTransformInfo.cpp AArch64: Do not test for CPUs, use SubtargetFeatures 2016-06-02 18:03:53 +00:00
AArch64TargetTransformInfo.h Do a sweep over move ctors and remove those that are identical to the default. 2016-10-20 12:20:28 +00:00
AArch64VectorByElementOpt.cpp [AArch64] Avoid generating indexed vector instructions for Exynos 2016-10-08 12:30:07 +00:00
CMakeLists.txt GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
LLVMBuild.txt [AArch64] Plug the beginning of the GlobalISel pipeline. 2016-02-11 19:35:06 +00:00