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AArch64
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[AArch64] Add support for secrel add/load/store relocations for COFF
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2018-03-01 20:42:28 +00:00 |
AMDGPU
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[AMDGPU] Add default ISA version targets
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2018-03-06 18:33:55 +00:00 |
ARM
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Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
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2018-03-07 16:27:44 +00:00 |
AsmParser
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[DebugInfo] Remove target-specific instructions in test
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2018-02-26 21:21:19 +00:00 |
AVR
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[AVR] Implement some missing code paths
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2017-12-11 11:01:27 +00:00 |
BPF
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bpf: New disassembler testcases for 32-bit subregister support
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2018-02-23 23:49:35 +00:00 |
COFF
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[CodeView] Add line numbers for inlined call sites
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2018-01-18 22:55:43 +00:00 |
Disassembler
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[ARM]Decoding MSR with unpredictable destination register causes an assert
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2018-03-06 15:21:19 +00:00 |
ELF
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Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""
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2018-03-07 16:27:44 +00:00 |
Hexagon
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[Hexagon] Add trap1 instruction
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2018-03-01 21:54:08 +00:00 |
Lanai
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MachO
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[DebugInfo] Support DWARF v5 source code embedding extension
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2018-02-23 23:01:06 +00:00 |
Markup
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Mips
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[mips] Correct the definition of m(f|t)c(0|2)
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2018-03-07 11:39:48 +00:00 |
PowerPC
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[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
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2018-02-23 15:55:16 +00:00 |
RISCV
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[RISCV] Implement MC relaxations for compressed instructions.
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2018-03-02 22:04:12 +00:00 |
Sparc
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[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
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2017-07-25 15:28:28 +00:00 |
SystemZ
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[SystemZ, AsmParser] Enable the mnemonic spell corrector.
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2017-07-18 09:17:00 +00:00 |
WebAssembly
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[WebAssembly] Avoid cast ExprType to wasm::ValType
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2018-03-02 21:33:14 +00:00 |
X86
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[X86] Add assembler/disassembler support for blendm with zero masking and broacast.
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2018-02-23 20:48:44 +00:00 |