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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
35 lines
1.3 KiB
LLVM
35 lines
1.3 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86-64 | grep paddw | count 2
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; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
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; The 2-addr pass should ensure that identical code is produced for these functions
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; no extra copy should be generated.
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define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind {
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entry:
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%tmp6 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
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%tmp8 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
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%tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
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%tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp10
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}
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define <2 x i64> @test2(<2 x i64> %x, <2 x i64> %y) nounwind {
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entry:
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%tmp6 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>> [#uses=1]
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%tmp8 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>> [#uses=1]
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%tmp9 = add <8 x i16> %tmp8, %tmp6 ; <<8 x i16>> [#uses=1]
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%tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp10
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}
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; The coalescer should commute the add to avoid a copy.
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define <4 x float> @test3(<4 x float> %V) {
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entry:
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%tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
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<4 x i32> < i32 3, i32 2, i32 1, i32 0 >
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%add = fadd <4 x float> %tmp8, %V
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ret <4 x float> %add
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}
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