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https://github.com/RPCS3/llvm-mirror.git
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f6bd9143a7
No code changes for this bunch, just some test rejigs. llvm-svn: 206291
59 lines
2.5 KiB
LLVM
59 lines
2.5 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -code-model=large | FileCheck --check-prefix=CHECK-LARGE %s
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; arm64 does not use literal pools for integers so there is nothing to check.
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@var32 = global i32 0
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@var64 = global i64 0
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define void @foo() {
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; CHECK-LABEL: foo:
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%val32 = load i32* @var32
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%val64 = load i64* @var64
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%val32_lit32 = and i32 %val32, 123456785
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store volatile i32 %val32_lit32, i32* @var32
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; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI0_[0-9]+]]
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; CHECK: ldr {{w[0-9]+}}, [x[[LITBASE]], {{#?}}:lo12:[[CURLIT]]]
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; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI0_[0-9]+]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]]
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; CHECK-LARGE: ldr {{w[0-9]+}}, [x[[LITADDR]]]
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%val64_lit32 = and i64 %val64, 305402420
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store volatile i64 %val64_lit32, i64* @var64
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; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI0_[0-9]+]]
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; CHECK: ldr {{w[0-9]+}}, [x[[LITBASE]], {{#?}}:lo12:[[CURLIT]]]
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; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI0_[0-9]+]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]]
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; CHECK-LARGE: ldr {{w[0-9]+}}, [x[[LITADDR]]]
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%val64_lit32signed = and i64 %val64, -12345678
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store volatile i64 %val64_lit32signed, i64* @var64
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; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI0_[0-9]+]]
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; CHECK: ldrsw {{x[0-9]+}}, [x[[LITBASE]], {{#?}}:lo12:[[CURLIT]]]
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; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI0_[0-9]+]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]]
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; CHECK-LARGE: ldrsw {{x[0-9]+}}, [x[[LITADDR]]]
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%val64_lit64 = and i64 %val64, 1234567898765432
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store volatile i64 %val64_lit64, i64* @var64
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; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI0_[0-9]+]]
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; CHECK: ldr {{x[0-9]+}}, [x[[LITBASE]], {{#?}}:lo12:[[CURLIT]]]
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; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI0_[0-9]+]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]]
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; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]]
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; CHECK-LARGE: ldr {{x[0-9]+}}, [x[[LITADDR]]]
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ret void
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}
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