Jack Carter f42f53d767 Fix the invalid opcode for Mips branch instructions in the assembler ... For mips a branch an 18-bit signed offset (the 16-bit offset field shifted left 2 bits) is added to the address of the instruction following the branch (not the branch itself), in the branch delay slot, to form a PC-relative effective target address. Previously, the code generator did not perform the shift of the immediate branch offset which resulted in wrong instruction opcode. This patch fixes the issue. Contributor: Vladimir Medic llvm-svn: 177687		2013-03-22 00:29:10 +00:00
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CMakeLists.txt	Forgot to add new file to CMakeLists	2013-01-30 02:32:36 +00:00
LLVMBuild.txt
Makefile
MipsAsmBackend.cpp	This patch produces the correct addend value for	2013-01-08 19:01:28 +00:00
MipsBaseInfo.h	[mips] Set HWEncoding field of registers. Use delete function	2012-12-10 20:04:40 +00:00
MipsDirectObjLower.cpp
MipsDirectObjLower.h
MipsELFObjectWriter.cpp	This patch reworks how llvm targets set	2013-01-30 02:09:52 +00:00
MipsELFStreamer.cpp	ELF symbol table field st_other support,	2013-02-19 22:29:00 +00:00
MipsELFStreamer.h	ELF symbol table field st_other support,	2013-02-19 22:04:37 +00:00
MipsFixupKinds.h	Mips direct object xgot support	2012-11-21 23:38:59 +00:00
MipsMCAsmInfo.cpp	Clean up assignment of CalleeSaveStackSlotSize: get rid of the default and explicitly set this in every target that needs to change it from the default.	2013-01-23 16:22:04 +00:00
MipsMCAsmInfo.h
MipsMCCodeEmitter.cpp	Fix the invalid opcode for Mips branch instructions in the assembler	2013-03-22 00:29:10 +00:00
MipsMCTargetDesc.cpp	This patch implements runtime Mips specific	2013-01-30 02:16:36 +00:00
MipsMCTargetDesc.h
MipsReginfo.cpp	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-18 21:20:38 +00:00
MipsReginfo.h	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-18 21:20:38 +00:00