mirror of
https://github.com/RPCS3/llvm-mirror.git
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9c34a7831d
to expose greater opportunities for store narrowing in codegen. This patch fixes a potential infinite loop in instcombine caused by one of the introduced transforms being overly aggressive. llvm-svn: 113763
652 lines
18 KiB
LLVM
652 lines
18 KiB
LLVM
; Tests to make sure elimination of casts is working correctly
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64"
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@inbuf = external global [32832 x i8] ; <[32832 x i8]*> [#uses=1]
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define i32 @test1(i32 %A) {
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%c1 = bitcast i32 %A to i32 ; <i32> [#uses=1]
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%c2 = bitcast i32 %c1 to i32 ; <i32> [#uses=1]
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ret i32 %c2
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; CHECK: ret i32 %A
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}
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define i64 @test2(i8 %A) {
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%c1 = zext i8 %A to i16 ; <i16> [#uses=1]
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%c2 = zext i16 %c1 to i32 ; <i32> [#uses=1]
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%Ret = zext i32 %c2 to i64 ; <i64> [#uses=1]
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ret i64 %Ret
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; CHECK: %Ret = zext i8 %A to i64
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; CHECK: ret i64 %Ret
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}
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; This function should just use bitwise AND
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define i64 @test3(i64 %A) {
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%c1 = trunc i64 %A to i8 ; <i8> [#uses=1]
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%c2 = zext i8 %c1 to i64 ; <i64> [#uses=1]
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ret i64 %c2
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; CHECK: %c2 = and i64 %A, 255
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; CHECK: ret i64 %c2
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}
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define i32 @test4(i32 %A, i32 %B) {
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%COND = icmp slt i32 %A, %B ; <i1> [#uses=1]
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; Booleans are unsigned integrals
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%c = zext i1 %COND to i8 ; <i8> [#uses=1]
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; for the cast elim purpose
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%result = zext i8 %c to i32 ; <i32> [#uses=1]
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ret i32 %result
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; CHECK: %COND = icmp slt i32 %A, %B
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; CHECK: %result = zext i1 %COND to i32
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; CHECK: ret i32 %result
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}
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define i32 @test5(i1 %B) {
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; This cast should get folded into
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%c = zext i1 %B to i8 ; <i8> [#uses=1]
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; this cast
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%result = zext i8 %c to i32 ; <i32> [#uses=1]
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ret i32 %result
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; CHECK: %result = zext i1 %B to i32
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; CHECK: ret i32 %result
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}
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define i32 @test6(i64 %A) {
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%c1 = trunc i64 %A to i32 ; <i32> [#uses=1]
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%res = bitcast i32 %c1 to i32 ; <i32> [#uses=1]
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ret i32 %res
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; CHECK: trunc i64 %A to i32
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; CHECK-NEXT: ret i32
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}
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define i64 @test7(i1 %A) {
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%c1 = zext i1 %A to i32 ; <i32> [#uses=1]
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%res = sext i32 %c1 to i64 ; <i64> [#uses=1]
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ret i64 %res
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; CHECK: %res = zext i1 %A to i64
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; CHECK: ret i64 %res
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}
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define i64 @test8(i8 %A) {
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%c1 = sext i8 %A to i64 ; <i64> [#uses=1]
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%res = bitcast i64 %c1 to i64 ; <i64> [#uses=1]
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ret i64 %res
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; CHECK: = sext i8 %A to i64
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; CHECK-NEXT: ret i64
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}
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define i16 @test9(i16 %A) {
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%c1 = sext i16 %A to i32 ; <i32> [#uses=1]
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%c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1]
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ret i16 %c2
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; CHECK: ret i16 %A
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}
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define i16 @test10(i16 %A) {
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%c1 = sext i16 %A to i32 ; <i32> [#uses=1]
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%c2 = trunc i32 %c1 to i16 ; <i16> [#uses=1]
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ret i16 %c2
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; CHECK: ret i16 %A
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}
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declare void @varargs(i32, ...)
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define void @test11(i32* %P) {
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%c = bitcast i32* %P to i16* ; <i16*> [#uses=1]
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call void (i32, ...)* @varargs( i32 5, i16* %c )
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ret void
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; CHECK: call void (i32, ...)* @varargs(i32 5, i32* %P)
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; CHECK: ret void
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}
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define i32* @test12() {
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%p = malloc [4 x i8] ; <[4 x i8]*> [#uses=1]
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%c = bitcast [4 x i8]* %p to i32* ; <i32*> [#uses=1]
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ret i32* %c
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; CHECK: %malloccall = tail call i8* @malloc(i32 4)
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; CHECK: ret i32* %c
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}
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define i8* @test13(i64 %A) {
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%c = getelementptr [0 x i8]* bitcast ([32832 x i8]* @inbuf to [0 x i8]*), i64 0, i64 %A ; <i8*> [#uses=1]
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ret i8* %c
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; CHECK: %c = getelementptr [32832 x i8]* @inbuf, i64 0, i64 %A
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; CHECK: ret i8* %c
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}
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define i1 @test14(i8 %A) {
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%c = bitcast i8 %A to i8 ; <i8> [#uses=1]
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%X = icmp ult i8 %c, -128 ; <i1> [#uses=1]
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ret i1 %X
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; CHECK: %X = icmp sgt i8 %A, -1
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; CHECK: ret i1 %X
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}
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; This just won't occur when there's no difference between ubyte and sbyte
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;bool %test15(ubyte %A) {
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; %c = cast ubyte %A to sbyte
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; %X = setlt sbyte %c, 0 ; setgt %A, 127
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; ret bool %X
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;}
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define i1 @test16(i32* %P) {
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%c = icmp ne i32* %P, null ; <i1> [#uses=1]
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ret i1 %c
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; CHECK: %c = icmp ne i32* %P, null
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; CHECK: ret i1 %c
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}
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define i16 @test17(i1 %tmp3) {
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%c = zext i1 %tmp3 to i32 ; <i32> [#uses=1]
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%t86 = trunc i32 %c to i16 ; <i16> [#uses=1]
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ret i16 %t86
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; CHECK: %t86 = zext i1 %tmp3 to i16
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; CHECK: ret i16 %t86
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}
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define i16 @test18(i8 %tmp3) {
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%c = sext i8 %tmp3 to i32 ; <i32> [#uses=1]
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%t86 = trunc i32 %c to i16 ; <i16> [#uses=1]
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ret i16 %t86
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; CHECK: %t86 = sext i8 %tmp3 to i16
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; CHECK: ret i16 %t86
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}
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define i1 @test19(i32 %X) {
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%c = sext i32 %X to i64 ; <i64> [#uses=1]
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%Z = icmp slt i64 %c, 12345 ; <i1> [#uses=1]
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ret i1 %Z
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; CHECK: %Z = icmp slt i32 %X, 12345
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; CHECK: ret i1 %Z
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}
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define i1 @test20(i1 %B) {
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%c = zext i1 %B to i32 ; <i32> [#uses=1]
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%D = icmp slt i32 %c, -1 ; <i1> [#uses=1]
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;; false
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ret i1 %D
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; CHECK: ret i1 false
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}
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define i32 @test21(i32 %X) {
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%c1 = trunc i32 %X to i8 ; <i8> [#uses=1]
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;; sext -> zext -> and -> nop
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%c2 = sext i8 %c1 to i32 ; <i32> [#uses=1]
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%RV = and i32 %c2, 255 ; <i32> [#uses=1]
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ret i32 %RV
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; CHECK: %c21 = and i32 %X, 255
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; CHECK: ret i32 %c21
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}
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define i32 @test22(i32 %X) {
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%c1 = trunc i32 %X to i8 ; <i8> [#uses=1]
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;; sext -> zext -> and -> nop
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%c2 = sext i8 %c1 to i32 ; <i32> [#uses=1]
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%RV = shl i32 %c2, 24 ; <i32> [#uses=1]
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ret i32 %RV
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; CHECK: shl i32 %X, 24
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; CHECK-NEXT: ret i32
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}
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define i32 @test23(i32 %X) {
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;; Turn into an AND even though X
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%c1 = trunc i32 %X to i16 ; <i16> [#uses=1]
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;; and Z are signed.
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%c2 = zext i16 %c1 to i32 ; <i32> [#uses=1]
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ret i32 %c2
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; CHECK: %c2 = and i32 %X, 65535
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; CHECK: ret i32 %c2
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}
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define i1 @test24(i1 %C) {
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%X = select i1 %C, i32 14, i32 1234 ; <i32> [#uses=1]
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;; Fold cast into select
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%c = icmp ne i32 %X, 0 ; <i1> [#uses=1]
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ret i1 %c
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; CHECK: ret i1 true
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}
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define void @test25(i32** %P) {
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%c = bitcast i32** %P to float** ; <float**> [#uses=1]
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;; Fold cast into null
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store float* null, float** %c
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ret void
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; CHECK: store i32* null, i32** %P
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; CHECK: ret void
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}
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define i32 @test26(float %F) {
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;; no need to cast from float->double.
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%c = fpext float %F to double ; <double> [#uses=1]
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%D = fptosi double %c to i32 ; <i32> [#uses=1]
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ret i32 %D
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; CHECK: %D = fptosi float %F to i32
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; CHECK: ret i32 %D
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}
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define [4 x float]* @test27([9 x [4 x float]]* %A) {
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%c = bitcast [9 x [4 x float]]* %A to [4 x float]* ; <[4 x float]*> [#uses=1]
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ret [4 x float]* %c
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; CHECK: %c = getelementptr inbounds [9 x [4 x float]]* %A, i64 0, i64 0
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; CHECK: ret [4 x float]* %c
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}
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define float* @test28([4 x float]* %A) {
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%c = bitcast [4 x float]* %A to float* ; <float*> [#uses=1]
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ret float* %c
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; CHECK: %c = getelementptr inbounds [4 x float]* %A, i64 0, i64 0
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; CHECK: ret float* %c
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}
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define i32 @test29(i32 %c1, i32 %c2) {
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%tmp1 = trunc i32 %c1 to i8 ; <i8> [#uses=1]
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%tmp4.mask = trunc i32 %c2 to i8 ; <i8> [#uses=1]
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%tmp = or i8 %tmp4.mask, %tmp1 ; <i8> [#uses=1]
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%tmp10 = zext i8 %tmp to i32 ; <i32> [#uses=1]
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ret i32 %tmp10
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; CHECK: %tmp2 = or i32 %c2, %c1
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; CHECK: %tmp10 = and i32 %tmp2, 255
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; CHECK: ret i32 %tmp10
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}
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define i32 @test30(i32 %c1) {
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%c2 = trunc i32 %c1 to i8 ; <i8> [#uses=1]
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%c3 = xor i8 %c2, 1 ; <i8> [#uses=1]
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%c4 = zext i8 %c3 to i32 ; <i32> [#uses=1]
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ret i32 %c4
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; CHECK: %c3 = and i32 %c1, 255
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; CHECK: %c4 = xor i32 %c3, 1
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; CHECK: ret i32 %c4
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}
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define i1 @test31(i64 %A) {
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%B = trunc i64 %A to i32 ; <i32> [#uses=1]
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%C = and i32 %B, 42 ; <i32> [#uses=1]
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%D = icmp eq i32 %C, 10 ; <i1> [#uses=1]
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ret i1 %D
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; CHECK: %C1 = and i64 %A, 42
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; CHECK: %D = icmp eq i64 %C1, 10
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; CHECK: ret i1 %D
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}
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define void @test32(double** %tmp) {
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%tmp8 = malloc [16 x i8] ; <[16 x i8]*> [#uses=1]
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%tmp8.upgrd.1 = bitcast [16 x i8]* %tmp8 to double* ; <double*> [#uses=1]
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store double* %tmp8.upgrd.1, double** %tmp
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ret void
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; CHECK: %malloccall = tail call i8* @malloc(i32 16)
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; CHECK: %tmp8.upgrd.1 = bitcast i8* %malloccall to double*
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; CHECK: store double* %tmp8.upgrd.1, double** %tmp
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; CHECK: ret void
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}
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define i32 @test33(i32 %c1) {
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%x = bitcast i32 %c1 to float ; <float> [#uses=1]
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%y = bitcast float %x to i32 ; <i32> [#uses=1]
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ret i32 %y
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; CHECK: ret i32 %c1
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}
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define i16 @test34(i16 %a) {
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%c1 = zext i16 %a to i32 ; <i32> [#uses=1]
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%tmp21 = lshr i32 %c1, 8 ; <i32> [#uses=1]
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%c2 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
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ret i16 %c2
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; CHECK: %tmp21 = lshr i16 %a, 8
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; CHECK: ret i16 %tmp21
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}
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define i16 @test35(i16 %a) {
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%c1 = bitcast i16 %a to i16 ; <i16> [#uses=1]
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%tmp2 = lshr i16 %c1, 8 ; <i16> [#uses=1]
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%c2 = bitcast i16 %tmp2 to i16 ; <i16> [#uses=1]
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ret i16 %c2
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; CHECK: %tmp2 = lshr i16 %a, 8
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; CHECK: ret i16 %tmp2
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}
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; icmp sgt i32 %a, -1
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; rdar://6480391
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define i1 @test36(i32 %a) {
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%b = lshr i32 %a, 31
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%c = trunc i32 %b to i8
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%d = icmp eq i8 %c, 0
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ret i1 %d
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; CHECK: %d = icmp sgt i32 %a, -1
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; CHECK: ret i1 %d
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}
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; ret i1 false
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define i1 @test37(i32 %a) {
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%b = lshr i32 %a, 31
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%c = or i32 %b, 512
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%d = trunc i32 %c to i8
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%e = icmp eq i8 %d, 11
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ret i1 %e
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; CHECK: ret i1 false
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}
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define i64 @test38(i32 %a) {
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%1 = icmp eq i32 %a, -2
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%2 = zext i1 %1 to i8
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%3 = xor i8 %2, 1
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%4 = zext i8 %3 to i64
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ret i64 %4
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; CHECK: %1 = icmp ne i32 %a, -2
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; CHECK: %2 = zext i1 %1 to i64
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; CHECK: ret i64 %2
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}
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define i16 @test39(i16 %a) {
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%tmp = zext i16 %a to i32
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%tmp21 = lshr i32 %tmp, 8
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%tmp5 = shl i32 %tmp, 8
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%tmp.upgrd.32 = or i32 %tmp21, %tmp5
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%tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
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ret i16 %tmp.upgrd.3
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; CHECK: @test39
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; CHECK: %tmp.upgrd.32 = call i16 @llvm.bswap.i16(i16 %a)
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; CHECK: ret i16 %tmp.upgrd.32
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}
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define i16 @test40(i16 %a) {
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%tmp = zext i16 %a to i32
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%tmp21 = lshr i32 %tmp, 9
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%tmp5 = shl i32 %tmp, 8
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%tmp.upgrd.32 = or i32 %tmp21, %tmp5
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%tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
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ret i16 %tmp.upgrd.3
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; CHECK: @test40
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; CHECK: %tmp21 = lshr i16 %a, 9
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; CHECK: %tmp5 = shl i16 %a, 8
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; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
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; CHECK: ret i16 %tmp.upgrd.32
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}
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; PR1263
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define i32* @test41(i32* %tmp1) {
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%tmp64 = bitcast i32* %tmp1 to { i32 }*
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%tmp65 = getelementptr { i32 }* %tmp64, i32 0, i32 0
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ret i32* %tmp65
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; CHECK: @test41
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; CHECK: ret i32* %tmp1
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}
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define i32 @test42(i32 %X) {
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%Y = trunc i32 %X to i8 ; <i8> [#uses=1]
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%Z = zext i8 %Y to i32 ; <i32> [#uses=1]
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ret i32 %Z
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; CHECK: @test42
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; CHECK: %Z = and i32 %X, 255
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}
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; rdar://6598839
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define zeroext i64 @test43(i8 zeroext %on_off) nounwind readonly {
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%A = zext i8 %on_off to i32
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%B = add i32 %A, -1
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%C = sext i32 %B to i64
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ret i64 %C ;; Should be (add (zext i8 -> i64), -1)
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; CHECK: @test43
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; CHECK-NEXT: %A = zext i8 %on_off to i64
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; CHECK-NEXT: %B = add i64 %A, -1
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; CHECK-NEXT: ret i64 %B
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}
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define i64 @test44(i8 %T) {
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%A = zext i8 %T to i16
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%B = or i16 %A, 1234
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%C = zext i16 %B to i64
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ret i64 %C
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; CHECK: @test44
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; CHECK-NEXT: %A = zext i8 %T to i64
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; CHECK-NEXT: %B = or i64 %A, 1234
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; CHECK-NEXT: ret i64 %B
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}
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define i64 @test45(i8 %A, i64 %Q) {
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%D = trunc i64 %Q to i32 ;; should be removed
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%B = sext i8 %A to i32
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%C = or i32 %B, %D
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%E = zext i32 %C to i64
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ret i64 %E
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; CHECK: @test45
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; CHECK-NEXT: %B = sext i8 %A to i64
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; CHECK-NEXT: %C = or i64 %B, %Q
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; CHECK-NEXT: %E = and i64 %C, 4294967295
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; CHECK-NEXT: ret i64 %E
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}
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define i64 @test46(i64 %A) {
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%B = trunc i64 %A to i32
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%C = and i32 %B, 42
|
|
%D = shl i32 %C, 8
|
|
%E = zext i32 %D to i64
|
|
ret i64 %E
|
|
; CHECK: @test46
|
|
; CHECK-NEXT: %C = shl i64 %A, 8
|
|
; CHECK-NEXT: %D = and i64 %C, 10752
|
|
; CHECK-NEXT: ret i64 %D
|
|
}
|
|
|
|
define i64 @test47(i8 %A) {
|
|
%B = sext i8 %A to i32
|
|
%C = or i32 %B, 42
|
|
%E = zext i32 %C to i64
|
|
ret i64 %E
|
|
; CHECK: @test47
|
|
; CHECK-NEXT: %B = sext i8 %A to i64
|
|
; CHECK-NEXT: %C = and i64 %B, 4294967253
|
|
; CHECK-NEXT: %E = or i64 %C, 42
|
|
; CHECK-NEXT: ret i64 %E
|
|
}
|
|
|
|
define i64 @test48(i8 %A, i8 %a) {
|
|
%b = zext i8 %a to i32
|
|
%B = zext i8 %A to i32
|
|
%C = shl i32 %B, 8
|
|
%D = or i32 %C, %b
|
|
%E = zext i32 %D to i64
|
|
ret i64 %E
|
|
; CHECK: @test48
|
|
; CHECK-NEXT: %b = zext i8 %a to i64
|
|
; CHECK-NEXT: %B = zext i8 %A to i64
|
|
; CHECK-NEXT: %C = shl i64 %B, 8
|
|
; CHECK-NEXT: %D = or i64 %C, %b
|
|
; CHECK-NEXT: ret i64 %D
|
|
}
|
|
|
|
define i64 @test49(i64 %A) {
|
|
%B = trunc i64 %A to i32
|
|
%C = or i32 %B, 1
|
|
%D = sext i32 %C to i64
|
|
ret i64 %D
|
|
; CHECK: @test49
|
|
; CHECK-NEXT: %C = shl i64 %A, 32
|
|
; CHECK-NEXT: ashr i64 %C, 32
|
|
; CHECK-NEXT: %D = or i64 {{.*}}, 1
|
|
; CHECK-NEXT: ret i64 %D
|
|
}
|
|
|
|
define i64 @test50(i64 %A) {
|
|
%a = lshr i64 %A, 2
|
|
%B = trunc i64 %a to i32
|
|
%D = add i32 %B, -1
|
|
%E = sext i32 %D to i64
|
|
ret i64 %E
|
|
; CHECK: @test50
|
|
; CHECK-NEXT: shl i64 %A, 30
|
|
; CHECK-NEXT: add i64 {{.*}}, -4294967296
|
|
; CHECK-NEXT: %E = ashr i64 {{.*}}, 32
|
|
; CHECK-NEXT: ret i64 %E
|
|
}
|
|
|
|
define i64 @test51(i64 %A, i1 %cond) {
|
|
%B = trunc i64 %A to i32
|
|
%C = and i32 %B, -2
|
|
%D = or i32 %B, 1
|
|
%E = select i1 %cond, i32 %C, i32 %D
|
|
%F = sext i32 %E to i64
|
|
ret i64 %F
|
|
; CHECK: @test51
|
|
|
|
; FIXME: disabled, see PR5997
|
|
; HECK-NEXT: %C = and i64 %A, 4294967294
|
|
; HECK-NEXT: %D = or i64 %A, 1
|
|
; HECK-NEXT: %E = select i1 %cond, i64 %C, i64 %D
|
|
; HECK-NEXT: %sext = shl i64 %E, 32
|
|
; HECK-NEXT: %F = ashr i64 %sext, 32
|
|
; HECK-NEXT: ret i64 %F
|
|
}
|
|
|
|
define i32 @test52(i64 %A) {
|
|
%B = trunc i64 %A to i16
|
|
%C = or i16 %B, -32574
|
|
%D = and i16 %C, -25350
|
|
%E = zext i16 %D to i32
|
|
ret i32 %E
|
|
; CHECK: @test52
|
|
; CHECK-NEXT: %B = trunc i64 %A to i32
|
|
; CHECK-NEXT: %C = and i32 %B, 7224
|
|
; CHECK-NEXT: %D = or i32 %C, 32962
|
|
; CHECK-NEXT: ret i32 %D
|
|
}
|
|
|
|
define i64 @test53(i32 %A) {
|
|
%B = trunc i32 %A to i16
|
|
%C = or i16 %B, -32574
|
|
%D = and i16 %C, -25350
|
|
%E = zext i16 %D to i64
|
|
ret i64 %E
|
|
; CHECK: @test53
|
|
; CHECK-NEXT: %B = zext i32 %A to i64
|
|
; CHECK-NEXT: %C = and i64 %B, 7224
|
|
; CHECK-NEXT: %D = or i64 %C, 32962
|
|
; CHECK-NEXT: ret i64 %D
|
|
}
|
|
|
|
define i32 @test54(i64 %A) {
|
|
%B = trunc i64 %A to i16
|
|
%C = or i16 %B, -32574
|
|
%D = and i16 %C, -25350
|
|
%E = sext i16 %D to i32
|
|
ret i32 %E
|
|
; CHECK: @test54
|
|
; CHECK-NEXT: %B = trunc i64 %A to i32
|
|
; CHECK-NEXT: %C = and i32 %B, 7224
|
|
; CHECK-NEXT: %D = or i32 %C, -32574
|
|
; CHECK-NEXT: ret i32 %D
|
|
}
|
|
|
|
define i64 @test55(i32 %A) {
|
|
%B = trunc i32 %A to i16
|
|
%C = or i16 %B, -32574
|
|
%D = and i16 %C, -25350
|
|
%E = sext i16 %D to i64
|
|
ret i64 %E
|
|
; CHECK: @test55
|
|
; CHECK-NEXT: %B = zext i32 %A to i64
|
|
; CHECK-NEXT: %C = and i64 %B, 7224
|
|
; CHECK-NEXT: %D = or i64 %C, -32574
|
|
; CHECK-NEXT: ret i64 %D
|
|
}
|
|
|
|
define i64 @test56(i16 %A) nounwind {
|
|
%tmp353 = sext i16 %A to i32
|
|
%tmp354 = lshr i32 %tmp353, 5
|
|
%tmp355 = zext i32 %tmp354 to i64
|
|
ret i64 %tmp355
|
|
; CHECK: @test56
|
|
; CHECK-NEXT: %tmp353 = sext i16 %A to i64
|
|
; CHECK-NEXT: %tmp354 = lshr i64 %tmp353, 5
|
|
; CHECK-NEXT: %tmp355 = and i64 %tmp354, 134217727
|
|
; CHECK-NEXT: ret i64 %tmp355
|
|
}
|
|
|
|
define i64 @test57(i64 %A) nounwind {
|
|
%B = trunc i64 %A to i32
|
|
%C = lshr i32 %B, 8
|
|
%E = zext i32 %C to i64
|
|
ret i64 %E
|
|
; CHECK: @test57
|
|
; CHECK-NEXT: %C = lshr i64 %A, 8
|
|
; CHECK-NEXT: %E = and i64 %C, 16777215
|
|
; CHECK-NEXT: ret i64 %E
|
|
}
|
|
|
|
define i64 @test58(i64 %A) nounwind {
|
|
%B = trunc i64 %A to i32
|
|
%C = lshr i32 %B, 8
|
|
%D = or i32 %C, 128
|
|
%E = zext i32 %D to i64
|
|
ret i64 %E
|
|
|
|
; CHECK: @test58
|
|
; CHECK-NEXT: %C = lshr i64 %A, 8
|
|
; CHECK-NEXT: %D = and i64 %C, 16777087
|
|
; CHECK-NEXT: %E = or i64 %D, 128
|
|
; CHECK-NEXT: ret i64 %E
|
|
}
|
|
|
|
define i64 @test59(i8 %A, i8 %B) nounwind {
|
|
%C = zext i8 %A to i32
|
|
%D = shl i32 %C, 4
|
|
%E = and i32 %D, 48
|
|
%F = zext i8 %B to i32
|
|
%G = lshr i32 %F, 4
|
|
%H = or i32 %G, %E
|
|
%I = zext i32 %H to i64
|
|
ret i64 %I
|
|
; CHECK: @test59
|
|
; CHECK-NEXT: %C = zext i8 %A to i64
|
|
; CHECK-NOT: i32
|
|
; CHECK: %F = zext i8 %B to i64
|
|
; CHECK-NOT: i32
|
|
; CHECK: ret i64 %H
|
|
}
|
|
|
|
define <3 x i32> @test60(<4 x i32> %call4) nounwind {
|
|
%tmp11 = bitcast <4 x i32> %call4 to i128
|
|
%tmp9 = trunc i128 %tmp11 to i96
|
|
%tmp10 = bitcast i96 %tmp9 to <3 x i32>
|
|
ret <3 x i32> %tmp10
|
|
|
|
; CHECK: @test60
|
|
; CHECK-NEXT: shufflevector
|
|
; CHECK-NEXT: ret
|
|
}
|
|
|
|
define <4 x i32> @test61(<3 x i32> %call4) nounwind {
|
|
%tmp11 = bitcast <3 x i32> %call4 to i96
|
|
%tmp9 = zext i96 %tmp11 to i128
|
|
%tmp10 = bitcast i128 %tmp9 to <4 x i32>
|
|
ret <4 x i32> %tmp10
|
|
; CHECK: @test61
|
|
; CHECK-NEXT: shufflevector
|
|
; CHECK-NEXT: ret
|
|
}
|
|
|
|
define <4 x i32> @test62(<3 x float> %call4) nounwind {
|
|
%tmp11 = bitcast <3 x float> %call4 to i96
|
|
%tmp9 = zext i96 %tmp11 to i128
|
|
%tmp10 = bitcast i128 %tmp9 to <4 x i32>
|
|
ret <4 x i32> %tmp10
|
|
; CHECK: @test62
|
|
; CHECK-NEXT: bitcast
|
|
; CHECK-NEXT: shufflevector
|
|
; CHECK-NEXT: ret
|
|
}
|
|
|
|
; PR7311 - Don't create invalid IR on scalar->vector cast.
|
|
define <2 x float> @test63(i64 %tmp8) nounwind {
|
|
entry:
|
|
%a = bitcast i64 %tmp8 to <2 x i32>
|
|
%vcvt.i = uitofp <2 x i32> %a to <2 x float>
|
|
ret <2 x float> %vcvt.i
|
|
; CHECK: @test63
|
|
; CHECK: bitcast
|
|
; CHECK: uitofp
|
|
}
|
|
|