Daniel Sanders f49e5efb1a [mips] .reginfo is 8 byte aligned on N32. ...

Differential Revision: http://reviews.llvm.org/D4540

llvm-svn: 213246

2014-07-17 10:10:04 +00:00

..

AArch64

[AArch64] Add negative tests for the SIMD & FP LDP instructions.

2014-07-15 16:33:24 +00:00

ARM

ARM: when falling back to scattered relocs, keep the type.

2014-07-04 10:58:05 +00:00

AsmParser

Allow using .cfi_startproc without a leading symbol.

2014-06-23 15:34:32 +00:00

COFF

MC: Let non-temporary COFF aliases be in symtab

2014-07-13 04:31:19 +00:00

Disassembler

[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA

2014-07-10 11:00:55 +00:00

ELF

Avoid revocations when possible.

2014-07-01 14:34:30 +00:00

MachO

llvm-readobj: fix MachO relocatoin printing a bit.

2014-07-04 10:57:56 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

[mips] .reginfo is 8 byte aligned on N32.

2014-07-17 10:10:04 +00:00

PowerPC

Emit DWARF3 call frame information when DWARF3+ debug info is requested

2014-06-19 15:39:33 +00:00

Sparc

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA

2014-07-10 11:00:55 +00:00

X86

[X86] AVX512: Only allow k1-k7 as predicates to vpcmp*

2014-07-08 00:22:32 +00:00