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76 lines
2.1 KiB
LLVM
76 lines
2.1 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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;;; Shift left
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; CHECK: vpslld
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; CHECK: vpslld
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define <8 x i32> @vshift00(<8 x i32> %a) nounwind readnone {
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%s = shl <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
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2>
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ret <8 x i32> %s
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}
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; CHECK: vpsllw
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; CHECK: vpsllw
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define <16 x i16> @vshift01(<16 x i16> %a) nounwind readnone {
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%s = shl <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
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ret <16 x i16> %s
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}
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; CHECK: vpsllq
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; CHECK: vpsllq
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define <4 x i64> @vshift02(<4 x i64> %a) nounwind readnone {
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%s = shl <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>
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ret <4 x i64> %s
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}
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;;; Logical Shift right
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; CHECK: vpsrld
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; CHECK: vpsrld
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define <8 x i32> @vshift03(<8 x i32> %a) nounwind readnone {
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%s = lshr <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
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2>
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ret <8 x i32> %s
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}
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; CHECK: vpsrlw
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; CHECK: vpsrlw
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define <16 x i16> @vshift04(<16 x i16> %a) nounwind readnone {
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%s = lshr <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
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ret <16 x i16> %s
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}
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; CHECK: vpsrlq
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; CHECK: vpsrlq
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define <4 x i64> @vshift05(<4 x i64> %a) nounwind readnone {
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%s = lshr <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>
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ret <4 x i64> %s
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}
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;;; Arithmetic Shift right
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; CHECK: vpsrad
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; CHECK: vpsrad
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define <8 x i32> @vshift06(<8 x i32> %a) nounwind readnone {
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%s = ashr <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
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2>
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ret <8 x i32> %s
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}
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; CHECK: vpsraw
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; CHECK: vpsraw
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define <16 x i16> @vshift07(<16 x i16> %a) nounwind readnone {
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%s = ashr <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
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ret <16 x i16> %s
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}
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;;; Support variable shifts
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; CHECK: _vshift08
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; CHECK: vextractf128 $1
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; CHECK: vpslld $23
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; CHECK: vextractf128 $1
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; CHECK: vpslld $23
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define <8 x i32> @vshift08(<8 x i32> %a) nounwind {
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%bitop = shl <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %a
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ret <8 x i32> %bitop
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}
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