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llvm-mirror/test/CodeGen/X86/widen_extract-1.ll
Chris Lattner ad85635a93 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.

llvm-svn: 122188
2010-12-19 20:12:58 +00:00

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399 B
LLVM

; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s
; widen extract subvector
define void @convert(<2 x double>* %dst.addr, <3 x double> %src) {
entry:
; CHECK: convert:
; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}}
; CHECK-NEXT: movapd
%val = shufflevector <3 x double> %src, <3 x double> undef, <2 x i32> < i32 0, i32 1>
store <2 x double> %val, <2 x double>* %dst.addr
ret void
}