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llvm-mirror/docs/AMDGPU/gfx10_perm_smem.rst
Dmitry Preobrazhensky 50947152c2 [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
2020-08-21 14:25:14 +03:00

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.. _amdgpu_synid10_perm_smem:
imm3
===========================
A bit mask which indicates request permissions.
This operand must be specified as an :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
The value is truncated to 7 bits, but only 3 low bits are significant.
============ ==============================
Bit Number Description
============ ==============================
0 Request *read* permission.
1 Request *write* permission.
2 Request *execute* permission.
============ ==============================