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llvm-mirror/lib/CodeGen/Passes.cpp
Jim Laskey f5e160063e 1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.

llvm-svn: 29450
2006-08-01 18:29:48 +00:00

43 lines
1.4 KiB
C++

//===-- Passes.cpp - Target independent code generation passes ------------===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines interfaces to access the target independent code
// generation passes provided by the LLVM backend.
//
//===---------------------------------------------------------------------===//
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include <iostream>
using namespace llvm;
namespace {
cl::opt<const char *, false, RegisterPassParser<RegisterRegAlloc> >
RegAlloc("regalloc",
cl::init("linearscan"),
cl::desc("Register allocator to use: (default = linearscan)"));
}
FunctionPass *llvm::createRegisterAllocator() {
RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
if (!Ctor) {
Ctor = RegisterRegAlloc::FindCtor(RegAlloc);
assert(Ctor && "No register allocator found");
if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor();
RegisterRegAlloc::setDefault(Ctor);
}
assert(Ctor && "No register allocator found");
return Ctor();
}