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f5e160063e
2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. llvm-svn: 29450
43 lines
1.4 KiB
C++
43 lines
1.4 KiB
C++
//===-- Passes.cpp - Target independent code generation passes ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines interfaces to access the target independent code
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// generation passes provided by the LLVM backend.
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//
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//===---------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachinePassRegistry.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/CommandLine.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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cl::opt<const char *, false, RegisterPassParser<RegisterRegAlloc> >
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RegAlloc("regalloc",
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cl::init("linearscan"),
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cl::desc("Register allocator to use: (default = linearscan)"));
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}
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FunctionPass *llvm::createRegisterAllocator() {
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RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
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if (!Ctor) {
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Ctor = RegisterRegAlloc::FindCtor(RegAlloc);
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assert(Ctor && "No register allocator found");
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if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor();
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RegisterRegAlloc::setDefault(Ctor);
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}
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assert(Ctor && "No register allocator found");
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return Ctor();
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}
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