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f6320ae69a
(lowercase isXXX). Patch by Jim Laskey. llvm-svn: 22708 |
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.. | ||
.cvsignore | ||
LICENSE.TXT | ||
Makefile | ||
PowerPC.h | ||
PowerPC.td | ||
PowerPCAsmPrinter.cpp | ||
PowerPCBranchSelector.cpp | ||
PowerPCFrameInfo.h | ||
PowerPCInstrBuilder.h | ||
PowerPCInstrFormats.td | ||
PowerPCInstrInfo.h | ||
PowerPCInstrInfo.td | ||
PowerPCJITInfo.h | ||
PowerPCRegisterInfo.td | ||
PowerPCTargetMachine.cpp | ||
PowerPCTargetMachine.h | ||
PPC32.td | ||
PPC32CodeEmitter.cpp | ||
PPC32InstrInfo.cpp | ||
PPC32InstrInfo.h | ||
PPC32ISelPattern.cpp | ||
PPC32ISelSimple.cpp | ||
PPC32JITInfo.cpp | ||
PPC32JITInfo.h | ||
PPC32RegisterInfo.cpp | ||
PPC32RegisterInfo.h | ||
PPC32RegisterInfo.td | ||
PPC32Relocations.h | ||
PPC32TargetMachine.h | ||
PPC64.td | ||
PPC64CodeEmitter.cpp | ||
PPC64InstrInfo.cpp | ||
PPC64InstrInfo.h | ||
PPC64ISelPattern.cpp | ||
PPC64JITInfo.h | ||
PPC64RegisterInfo.cpp | ||
PPC64RegisterInfo.h | ||
PPC64RegisterInfo.td | ||
PPC64TargetMachine.h | ||
PPCSubtarget.cpp | ||
PPCSubtarget.h | ||
README.txt |
TODO: * gpr0 allocation * implement do-loop -> bdnz transform * implement powerpc-64 for darwin * use stfiwx in float->int * be able to combine sequences like the following into 2 instructions: lis r2, ha16(l2__ZTV4Cell) la r2, lo16(l2__ZTV4Cell)(r2) addi r2, r2, 8 * Support 'update' load/store instructions. These are cracked on the G5, but are still a codesize win. * should hint to the branch select pass that it doesn't need to print the second unconditional branch, so we don't end up with things like: b .LBBl42__2E_expand_function_8_674 ; loopentry.24 b .LBBl42__2E_expand_function_8_42 ; NewDefault b .LBBl42__2E_expand_function_8_42 ; NewDefault