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The z13 vector facility includes some instructions that operate only on the high f64 in a v2f64, effectively extending the FP register set from 16 to 32 registers. It's still better to use the old instructions if the operands happen to fit though, since the older instructions have a shorter encoding. Based on a patch by Richard Sandiford. llvm-svn: 236524
34 lines
976 B
LLVM
34 lines
976 B
LLVM
; Test conversions between different-sized float elements.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test cases where both elements of a v2f64 are converted to f32s.
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define void @f1(<2 x double> %val, <2 x float> *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vledb {{%v[0-9]+}}, %v24, 0, 0
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; CHECK: br %r14
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%res = fptrunc <2 x double> %val to <2 x float>
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store <2 x float> %res, <2 x float> *%ptr
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ret void
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}
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; Test conversion of an f64 in a vector register to an f32.
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define float @f2(<2 x double> %vec) {
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; CHECK-LABEL: f2:
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; CHECK: wledb %f0, %v24
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; CHECK: br %r14
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%scalar = extractelement <2 x double> %vec, i32 0
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%ret = fptrunc double %scalar to float
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ret float %ret
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}
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; Test conversion of an f32 in a vector register to an f64.
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define double @f3(<4 x float> %vec) {
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; CHECK-LABEL: f3:
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; CHECK: wldeb %f0, %v24
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; CHECK: br %r14
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%scalar = extractelement <4 x float> %vec, i32 0
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%ret = fpext float %scalar to double
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ret double %ret
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}
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