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https://github.com/RPCS3/llvm-mirror.git
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dcc07680b9
Summary: Before ARMv5T, Thumb1 code could not pop PC, as described at D14357 and D14986; so we need the special fixup in the epilogue. Reviewers: jroelofs, qcolombet Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15126 llvm-svn: 255047
81 lines
2.3 KiB
LLVM
81 lines
2.3 KiB
LLVM
; RUN: llc < %s -mtriple=thumb-apple-ios | FileCheck %s --check-prefix=CHECK --check-prefix=IOS
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; RUN: llc < %s -mtriple=thumb-none-eabi | FileCheck %s --check-prefix=CHECK --check-prefix=EABI
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; RUN: llc < %s -o %t -filetype=obj -mtriple=thumbv6-apple-ios
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; RUN: llvm-objdump -triple=thumbv6-apple-ios -d %t | FileCheck %s --check-prefix=CHECK --check-prefix=IOS
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; RUN: llc < %s -o %t -filetype=obj -mtriple=thumbv6-none-eabi
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; RUN: llvm-objdump -triple=thumbv6-none-eabi -d %t | FileCheck %s --check-prefix=CHECK --check-prefix=EABI
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; Largest stack for which a single tADDspi/tSUBspi is enough
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define void @test1() {
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; CHECK-LABEL: test1:
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; CHECK: sub sp, #508
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; CHECK: add sp, #508
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%tmp = alloca [ 508 x i8 ] , align 4
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ret void
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}
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; Largest stack for which three tADDspi/tSUBspis are enough
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define void @test100() {
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; CHECK-LABEL: test100:
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; CHECK: sub sp, #508
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; EABI: add sp, #508
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; EABI: add sp, #508
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; EABI: add sp, #508
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; IOS: subs r4, r7, #4
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; IOS: mov sp, r4
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%tmp = alloca [ 1524 x i8 ] , align 4
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ret void
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}
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; Smallest stack for which we use a constant pool
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define void @test2() {
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; CHECK-LABEL: test2:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; EABI: ldr [[TEMP:r[0-7]]],
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; EABI: add sp, [[TEMP]]
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; IOS: subs r4, r7, #4
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; IOS: mov sp, r4
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%tmp = alloca [ 1528 x i8 ] , align 4
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ret void
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}
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define i32 @test3() {
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; CHECK-LABEL: test3:
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; CHECK: ldr [[TEMP:r[0-7]]],
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; CHECK: add sp, [[TEMP]]
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; CHECK: ldr [[TEMP]],
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; CHECK: add [[TEMP]], sp
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; EABI: ldr [[TEMP:r[0-7]]],
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; EABI: add sp, [[TEMP]]
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; IOS: subs r4, r7, #4
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; IOS: mov sp, r4
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%retval = alloca i32, align 4
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%tmp = alloca i32, align 4
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%a = alloca [805306369 x i8], align 16
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store i32 0, i32* %tmp
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%tmp1 = load i32, i32* %tmp
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ret i32 %tmp1
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}
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; Here, the adds get optimized out because they are dead, but the calculation
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; of the address of stack_a is dead but not optimized out. When the address
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; calculation gets expanded to two instructions, we need to avoid reading a
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; dead register.
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; No CHECK lines (just test for crashes), as we hope this will be optimised
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; better in future.
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define i32 @test4() {
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entry:
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%stack_a = alloca i8, align 1
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%stack_b = alloca [256 x i32*], align 4
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%int = ptrtoint i8* %stack_a to i32
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%add = add i32 %int, 1
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br label %block2
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block2:
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%add2 = add i32 %add, 1
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ret i32 0
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}
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