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7956f36dac
I really thought we were doing this already, but we were not. Given this input:
void Test(int *res, int *c, int *d, int *p) {
for (int i = 0; i < 16; i++)
res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
}
we did not vectorize the loop. Even with "assume_safety" the check that we
don't if-convert conditionally-executed loads (to protect against
data-dependent deferenceability) was not elided.
One subtlety: As implemented, it will still prefer to use a masked-load
instrinsic (given target support) over the speculated load. The choice here
seems architecture specific; the best option depends on how expensive the
masked load is compared to a regular load. Ideally, using the masked load still
reduces unnecessary memory traffic, and so should be preferred. If we'd rather
do it the other way, flipping the order of the checks is easy.
The LangRef is updated to make explicit that llvm.mem.parallel_loop_access also
implies that if conversion is okay.
Differential Revision: http://reviews.llvm.org/D19512
llvm-svn: 267514
42 lines
1.7 KiB
LLVM
42 lines
1.7 KiB
LLVM
; RUN: opt -loop-vectorize -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function Attrs: norecurse nounwind uwtable
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define void @Test(i32* nocapture %res, i32* nocapture readnone %c, i32* nocapture readonly %d, i32* nocapture readonly %p) #0 {
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entry:
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br label %for.body
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; CHECK-LABEL: @Test
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; CHECK: <4 x i32>
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for.body: ; preds = %cond.end, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %cond.end ]
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%arrayidx = getelementptr inbounds i32, i32* %p, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !0
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%cmp1 = icmp eq i32 %0, 0
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%arrayidx3 = getelementptr inbounds i32, i32* %res, i64 %indvars.iv
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%1 = load i32, i32* %arrayidx3, align 4, !llvm.mem.parallel_loop_access !0
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br i1 %cmp1, label %cond.end, label %cond.false
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cond.false: ; preds = %for.body
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%arrayidx7 = getelementptr inbounds i32, i32* %d, i64 %indvars.iv
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%2 = load i32, i32* %arrayidx7, align 4, !llvm.mem.parallel_loop_access !0
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%add = add nsw i32 %2, %1
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br label %cond.end
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cond.end: ; preds = %for.body, %cond.false
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%cond = phi i32 [ %add, %cond.false ], [ %1, %for.body ]
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store i32 %cond, i32* %arrayidx3, align 4, !llvm.mem.parallel_loop_access !0
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 16
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
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for.end: ; preds = %cond.end
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ret void
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}
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attributes #0 = { norecurse nounwind uwtable "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" }
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!0 = distinct !{!0}
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