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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
48 lines
2.6 KiB
LLVM
48 lines
2.6 KiB
LLVM
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
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; RUN: grep {fadd float}
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
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; RUN: grep {fmul float}
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
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; RUN: not grep {insertelement.*0.00}
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
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; RUN: not grep {call.*llvm.x86.sse.mul}
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
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; RUN: not grep {call.*llvm.x86.sse.sub}
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; END.
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define i16 @test1(float %f) {
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entry:
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%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
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%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
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%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
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%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
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%tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
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%tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
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%tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
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ret i16 %tmp69
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}
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define i32 @test2(float %f) {
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%tmp5 = fmul float %f, %f
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%tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
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%tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
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%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
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%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
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%tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
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%tmp21 = extractelement <4 x i32> %tmp19, i32 0
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ret i32 %tmp21
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}
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
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declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
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