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ARM seems to prefer that long literals be formed from their little end in order to promote the fusion of the instrs pairs MOV/MOVK and MOVK/MOVK on Cortex A57 and others (v. "Cortex A57 Software Optimisation Guide", section 4.14). Differential revision: https://reviews.llvm.org/D28697 llvm-svn: 292422
31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
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; RUN: llc < %s -mtriple=arm64-linux-gnu -code-model=large| FileCheck %s --check-prefix=CHECK-LARGE
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; rdar://9188695
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define i64 @t() nounwind ssp {
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entry:
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; CHECK-LABEL: t:
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; CHECK: adrp [[REG:x[0-9]+]], Ltmp1@PAGE
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; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp1@PAGEOFF
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; CHECK-LINUX-LABEL: t:
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; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp1
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; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp1
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; CHECK-LARGE-LABEL: t:
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; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g0_nc:[[DEST_LBL:.Ltmp[0-9]+]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g1_nc:[[DEST_LBL]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g2_nc:[[DEST_LBL]]
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; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g3:[[DEST_LBL]]
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%recover = alloca i64, align 8
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store volatile i64 ptrtoint (i8* blockaddress(@t, %mylabel) to i64), i64* %recover, align 8
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br label %mylabel
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mylabel:
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%tmp = load volatile i64, i64* %recover, align 8
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ret i64 %tmp
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}
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