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2e307633f3
Re-recommiting after landing DAG extension-crash fix. Recommiting after adding check to avoid miscomputing alias information on addresses of the same base but different subindices. Memory accesses offset from frame indices may alias, e.g., we may merge write from function arguments passed on the stack when they are contiguous. As a result, when checking aliasing, we consider the underlying frame index's offset from the stack pointer. Static allocs are realized as stack objects in SelectionDAG, but its offset is not set until post-DAG causing DAGCombiner's alias check to consider access to static allocas to frequently alias. Modify isAlias to consider access between static allocas and access from other frame objects to be considered aliasing. Many test changes are included here. Most are fixes for tests which indirectly relied on our aliasing ability and needed to be modified to preserve their original intent. The remaining tests have minor improvements due to relaxed ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll which has a minor degradation dispite though the pre-legalized DAG is improved. Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand Reviewed By: rnk Subscribers: sdardis, nemanjai, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33345 llvm-svn: 308350
37 lines
1.5 KiB
LLVM
37 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=arm64-apple-darwin8.0 -relocation-model=pic -O1 < %s | FileCheck %s
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@.str2 = private unnamed_addr constant [9 x i8] c"_%d____\0A\00", align 1
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; Function Attrs: nounwind ssp
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define i32 @main(i32 %argc, i8** %argv) #0 {
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main_:
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%tmp = alloca i32, align 4
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%i32T = alloca i32, align 4
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%i32F = alloca i32, align 4
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%i32X = alloca i32, align 4
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store i32 %argc, i32* %tmp
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store i32 15, i32* %i32T, align 4
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store i32 5, i32* %i32F, align 4
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%tmp6 = load i32, i32* %tmp, align 4
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%tmp7 = icmp ne i32 %tmp6, 0
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%tmp8 = xor i1 %tmp7, true
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%tmp9 = load i32, i32* %i32T, align 4
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%tmp10 = load i32, i32* %i32F, align 4
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%DHSelect = select i1 %tmp8, i32 %tmp9, i32 %tmp10
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store i32 %DHSelect, i32* %i32X, align 4
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%tmp15 = load i32, i32* %i32X, align 4
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%tmp17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str2, i32 0, i32 0), i32 %tmp15)
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ret i32 0
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; CHECK: main:
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; CHECK-DAG: mov
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; CHECK-DAG: orr
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; CHECK: csel
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}
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declare i32 @printf(i8*, ...) #1
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attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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