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78143c1a3b
This patch adds a custom lowering for ISD::MULH{S,U} used on divide by
constant optimization (DAGCombiner::BuildSDIV and DAGCombiner::BuildUDIV).
New patterns for smull and umull are added, so AArch64ISD::{S,U}MULL
can be correctly lowered to smull2 and umull2.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D46009
llvm-svn: 331522
16 lines
707 B
LLVM
16 lines
707 B
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -mattr=+neon | FileCheck %s
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define <4 x i32> @test1(<4 x i32> %a) {
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%rem = srem <4 x i32> %a, <i32 7, i32 7, i32 7, i32 7>
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ret <4 x i32> %rem
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; For C constant X/C is simplified to X-X/C*C. The X/C division is lowered
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; to MULHS due the simplification by multiplying by a magic number
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; (TargetLowering::BuildSDIV).
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; CHECK-LABEL: test1:
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; CHECK: smull2 [[SMULL2:(v[0-9]+)]].2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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; CHECK: smull [[SMULL:(v[0-9]+)]].2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
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; CHECK: uzp2 [[UZP2:(v[0-9]+).4s]], [[SMULL]].4s, [[SMULL2]].4s
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; CHECK: add [[ADD:(v[0-9]+.4s)]], [[UZP2]], v0.4s
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; CHECK: sshr [[SSHR:(v[0-9]+.4s)]], [[ADD]], #2
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}
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