mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-22 20:43:44 +02:00
b3c888286c
This has proven a healthy exercise, as many cases of incorrect instruction flags were corrected in the process. As part of this, IntrWriteMem was added to several SystemZ instrinsics. Furthermore, a bug was exposed in TwoAddress with this change (as incorrect hasSideEffects flags were removed and instructions could now be sunk), and the test case for that bugfix (r319646) is included here as test/CodeGen/SystemZ/twoaddr-sink.ll. One temporary test regression (one extra copy) which will hopefully go away in upcoming patches for similar cases: test/CodeGen/SystemZ/vec-trunc-to-i1.ll Review: Ulrich Weigand. https://reviews.llvm.org/D40437 llvm-svn: 319756
16 lines
590 B
LLVM
16 lines
590 B
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -no-integrated-as
|
|
;
|
|
; Check that TwoAddressInstructionPass does not crash after sinking (and
|
|
; revisiting) an instruction that was lowered by TII->convertToThreeAddress()
|
|
; which contains a %noreg operand.
|
|
|
|
define i32 @f23(i32 %old) {
|
|
%and1 = and i32 %old, 14
|
|
%and2 = and i32 %old, 254
|
|
%res1 = call i32 asm "stepa $1, $2, $3", "=h,r,r,0"(i32 %old, i32 %and1, i32 %and2)
|
|
%and3 = and i32 %res1, 127
|
|
%and4 = and i32 %res1, 128
|
|
%res2 = call i32 asm "stepb $1, $2, $3", "=r,h,h,0"(i32 %res1, i32 %and3, i32 %and4)
|
|
ret i32 %res2
|
|
}
|