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2899011d94
This is a preliminary step for a preliminary step for D50992. I noticed that x86 often misses chances to load a scalar directly into a vector register. So this patch is just allowing more of those cases to match a broadcast op in lowerBuildVectorAsBroadcast(). The old code comment said it doesn't make sense to use a broadcast when we're loading a single element and everything else is undef, but I think that's the best case in the improved tests in insert-loaded-scalar.ll. We avoid scalar-to-vector-register move and/or less efficient shuffling. Note that there are some existing types that were already producing a broadcast, but that happens semi-accidentally. Ie, it's not happening as part of lowerBuildVectorAsBroadcast(). The build vector gets expanded into load + shuffle, and then shuffle lowering produces the broadcast. Description of the other test diffs: 1. avx-basic.ll - replacing load+shufle is a win. 2. sse3-avx-addsub-2.ll - vmovddup vs. vbroadcastss is neutral 3. sse41.ll - don't care - we convert that intrinsic to generic IR now, so this test is deprecated 4. vector-shuffle-128-v8.ll / vector-shuffle-256-v16.ll - pshufb alternatives with an extra instruction are not obviously bad Differential Revision: https://reviews.llvm.org/D51125 llvm-svn: 340685
135 lines
5.1 KiB
LLVM
135 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s
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@x = common global <8 x float> zeroinitializer, align 32
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@y = common global <4 x double> zeroinitializer, align 32
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@z = common global <4 x float> zeroinitializer, align 16
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define void @zero128() nounwind ssp {
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; CHECK-LABEL: zero128:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: movq _z@{{.*}}(%rip), %rax
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; CHECK-NEXT: vmovaps %xmm0, (%rax)
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; CHECK-NEXT: retq
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store <4 x float> zeroinitializer, <4 x float>* @z, align 16
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ret void
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}
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define void @zero256() nounwind ssp {
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; CHECK-LABEL: zero256:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movq _x@{{.*}}(%rip), %rax
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vmovaps %ymm0, (%rax)
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; CHECK-NEXT: movq _y@{{.*}}(%rip), %rax
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; CHECK-NEXT: vmovaps %ymm0, (%rax)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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store <8 x float> zeroinitializer, <8 x float>* @x, align 32
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store <4 x double> zeroinitializer, <4 x double>* @y, align 32
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ret void
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}
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define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind {
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; CHECK-LABEL: ones:
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; CHECK: ## %bb.0: ## %allocas
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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allocas:
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%ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>*
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store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float
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0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float
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0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x
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float>* %ptr2vec615, align 32
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ret void
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}
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define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind {
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; CHECK-LABEL: ones2:
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; CHECK: ## %bb.0: ## %allocas
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%rdi)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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allocas:
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%ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>*
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store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32
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ret void
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}
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;;; Just make sure this doesn't crash
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define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: ISelCrash:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-NEXT: retq
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4>
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ret <4 x i64> %shuffle
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}
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;;; Don't crash on movd
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define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind {
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; CHECK-LABEL: VMOVZQI2PQI:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
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; CHECK-NEXT: retq
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%ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32*
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%val.i34.i = load i32, i32* %ptrcast.i33.i, align 4
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%ptroffset.i22.i992 = getelementptr [0 x float], [0 x float]* %aFOO, i64 0, i64 1
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%ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32*
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%val.i24.i = load i32, i32* %ptrcast.i23.i, align 4
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%updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1
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ret <8 x i32> %updatedret.i30.i
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}
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;;;; Don't crash on fneg
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; rdar://10566486
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define <16 x float> @fneg(<16 x float> %a) nounwind {
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; CHECK-LABEL: fneg:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00]
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; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0
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; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1
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; CHECK-NEXT: retq
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%1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a
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ret <16 x float> %1
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}
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;;; Don't crash on build vector
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define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly {
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; CHECK-LABEL: build_vec_16x16:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movzwl %di, %eax
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; CHECK-NEXT: vmovd %eax, %xmm0
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; CHECK-NEXT: retq
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%res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0
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ret <16 x i16> %res
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}
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;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously
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;;; an incorrect mnemonic of "movd" was printed for this instruction.
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define i64 @VMOVPQIto64rr(<2 x i64> %a) {
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; CHECK-LABEL: VMOVPQIto64rr:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vmovq %xmm0, %rax
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; CHECK-NEXT: retq
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%vecext.i = extractelement <2 x i64> %a, i32 0
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ret i64 %vecext.i
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}
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; PR22685
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define <8 x float> @mov00_8f32(float* %ptr) {
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; CHECK-LABEL: mov00_8f32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: retq
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%val = load float, float* %ptr
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%vec = insertelement <8 x float> zeroinitializer, float %val, i32 0
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ret <8 x float> %vec
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}
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