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e68c91d039
Try to reverse the constant-shrinking that happens in SimplifyDemandedBits() for 'and' masks when it results in a smaller sign-extended immediate. We are also able to detect dead 'and' ops here (the mask is all ones). In that case, we replace and return without selecting the 'and'. Other targets might want to share some of this logic by enabling this under a target hook, but I didn't see diffs for simple cases with PowerPC or AArch64, so they may already have some specialized logic for this kind of thing or have different needs. This should solve PR35907: https://bugs.llvm.org/show_bug.cgi?id=35907 Differential Revision: https://reviews.llvm.org/D42088 llvm-svn: 322957
39 lines
1.2 KiB
LLVM
39 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -o - %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@global = external global i32
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@global.1 = external global i64
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define void @patatino() {
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; CHECK-LABEL: patatino:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: movl {{.*}}(%rip), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shrl $31, %ecx
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; CHECK-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
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; CHECK-NEXT: shrl $31, %ecx
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; CHECK-NEXT: andl $-2, %ecx
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; CHECK-NEXT: andl $-536870912, %eax # imm = 0xE0000000
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: movl %eax, {{.*}}(%rip)
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; CHECK-NEXT: retq
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bb:
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%tmp = load i32, i32* @global
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%tmp1 = lshr i32 %tmp, 31
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%tmp2 = add nuw nsw i32 %tmp1, 2147483647
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%tmp3 = load i64, i64* @global.1
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%tmp4 = shl i64 %tmp3, 23
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%tmp5 = add nsw i64 %tmp4, 8388639
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%tmp6 = trunc i64 %tmp5 to i32
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%tmp7 = lshr i32 %tmp2, %tmp6
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%tmp8 = load i32, i32* @global
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%tmp9 = and i32 %tmp7, 62
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%tmp10 = and i32 %tmp8, -536870912
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%tmp11 = or i32 %tmp9, %tmp10
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store i32 %tmp11, i32* @global
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ret void
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}
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