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c5caaf9155
If the upper 32 bits of a 64 bit mask are all zeros, we have special isel patterns to use a 32-bit and instead of a 64-bit and by relying on the impliciting zeroing of 32 bit ops. This patch teachs shrinkAndImmediate not to break that optimization. Differential Revision: https://reviews.llvm.org/D42899 llvm-svn: 324249
15 lines
384 B
LLVM
15 lines
384 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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define i64 @test(i64 %A) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shrq $54, %rdi
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; CHECK-NEXT: andl $-4, %edi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%B = lshr i64 %A, 56
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%C = shl i64 %B, 2
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ret i64 %C
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}
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